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AP_HAL_ChibiOS: correct QSPI flash and GPIO speeds on SPRacingH7 and DevEBoxH7v2

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This commit is contained in:
Andy Piper 2023-01-15 15:22:03 +00:00 committed by Andrew Tridgell
parent 39b226c46b
commit 4b4d2c52c8
4 changed files with 28 additions and 26 deletions
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14
libraries/AP_HAL_ChibiOS/hwdef/DevEBoxH7v2/hwdef-bl.dat
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@ -29,15 +29,15 @@ PE8 UART7_TX UART7 NODMA
define BOOTLOADER_DEBUG SD7
# QuadSPI Flash
PD11 QUADSPI_BK1_IO0 QUADSPI1
PD12 QUADSPI_BK1_IO1 QUADSPI1
PE2 QUADSPI_BK1_IO2 QUADSPI1
PD13 QUADSPI_BK1_IO3 QUADSPI1
PB6 QUADSPI_BK1_NCS QUADSPI1
PB2 QUADSPI_CLK QUADSPI1
PD11 QUADSPI_BK1_IO0 QUADSPI1 SPEED_HIGH
PD12 QUADSPI_BK1_IO1 QUADSPI1 SPEED_HIGH
PE2 QUADSPI_BK1_IO2 QUADSPI1 SPEED_HIGH
PD13 QUADSPI_BK1_IO3 QUADSPI1 SPEED_HIGH
PB6 QUADSPI_BK1_NCS QUADSPI1 SPEED_HIGH
PB2 QUADSPI_CLK QUADSPI1 SPEED_HIGH
# IFace Device Name Bus QSPI Mode Clk Freq Size (Pow2) NCS Delay
QSPIDEV w25q QUADSPI1 MODE3 120*MHZ 23 2
QSPIDEV w25q QUADSPI1 MODE3 100*MHZ 23 1
# USART1
PA10 USART1_RX USART1

12
libraries/AP_HAL_ChibiOS/hwdef/DevEBoxH7v2/hwdef.dat
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@ -102,12 +102,12 @@ PC12 SDMMC1_CK SDMMC1
PD2 SDMMC1_CMD SDMMC1
# QuadSPI Flash
PD11 QUADSPI_BK1_IO0 QUADSPI1
PD12 QUADSPI_BK1_IO1 QUADSPI1
PE2 QUADSPI_BK1_IO2 QUADSPI1
PD13 QUADSPI_BK1_IO3 QUADSPI1
PB6 QUADSPI_BK1_NCS QUADSPI1
PB2 QUADSPI_CLK QUADSPI1
PD11 QUADSPI_BK1_IO0 QUADSPI1 SPEED_HIGH
PD12 QUADSPI_BK1_IO1 QUADSPI1 SPEED_HIGH
PE2 QUADSPI_BK1_IO2 QUADSPI1 SPEED_HIGH
PD13 QUADSPI_BK1_IO3 QUADSPI1 SPEED_HIGH
PB6 QUADSPI_BK1_NCS QUADSPI1 SPEED_HIGH
PB2 QUADSPI_CLK QUADSPI1 SPEED_HIGH
# Motors
PA0 TIM5_CH1 TIM5 PWM(1) GPIO(50) # M1

16
libraries/AP_HAL_ChibiOS/hwdef/SPRacingH7/hwdef-bl.dat
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@ -10,6 +10,8 @@ APJ_BOARD_ID 1060
# crystal frequency, setup to use external oscillator
OSCILLATOR_HZ 8000000
MCU_CLOCKRATE_MHZ 480
# limited flash that can't be used
FLASH_SIZE_KB 128
FLASH_RESERVE_START_KB 0
@ -39,15 +41,15 @@ PE3 LED_BOOTLOADER OUTPUT LOW # Red LED
define HAL_LED_ON 0
# QuadSPI Flash
PD11 QUADSPI_BK1_IO0 QUADSPI1
PD12 QUADSPI_BK1_IO1 QUADSPI1
PE2 QUADSPI_BK1_IO2 QUADSPI1
PD13 QUADSPI_BK1_IO3 QUADSPI1
PB10 QUADSPI_BK1_NCS QUADSPI1
PB2 QUADSPI_CLK QUADSPI1
PD11 QUADSPI_BK1_IO0 QUADSPI1 SPEED_HIGH
PD12 QUADSPI_BK1_IO1 QUADSPI1 SPEED_HIGH
PE2 QUADSPI_BK1_IO2 QUADSPI1 SPEED_HIGH
PD13 QUADSPI_BK1_IO3 QUADSPI1 SPEED_HIGH
PB10 QUADSPI_BK1_NCS QUADSPI1 SPEED_HIGH
PB2 QUADSPI_CLK QUADSPI1 SPEED_HIGH
# IFace Device Name Bus QSPI Mode Clk Freq Size (Pow2) NCS Delay
QSPIDEV w25q-dtr QUADSPI1 MODE3 120*MHZ 24 2
QSPIDEV w25q-dtr QUADSPI1 MODE3 100*MHZ 24 1
define HAL_USE_EMPTY_STORAGE 1
define HAL_STORAGE_SIZE 16384

12
libraries/AP_HAL_ChibiOS/hwdef/SPRacingH7/hwdef.dat
View File

@ -127,12 +127,12 @@ PC12 SDMMC1_CK SDMMC1
PD2 SDMMC1_CMD SDMMC1
# QuadSPI Flash
PD11 QUADSPI_BK1_IO0 QUADSPI1
PD12 QUADSPI_BK1_IO1 QUADSPI1
PE2 QUADSPI_BK1_IO2 QUADSPI1
PD13 QUADSPI_BK1_IO3 QUADSPI1
PB10 QUADSPI_BK1_NCS QUADSPI1
PB2 QUADSPI_CLK QUADSPI1
PD11 QUADSPI_BK1_IO0 QUADSPI1 SPEED_HIGH
PD12 QUADSPI_BK1_IO1 QUADSPI1 SPEED_HIGH
PE2 QUADSPI_BK1_IO2 QUADSPI1 SPEED_HIGH
PD13 QUADSPI_BK1_IO3 QUADSPI1 SPEED_HIGH
PB10 QUADSPI_BK1_NCS QUADSPI1 SPEED_HIGH
PB2 QUADSPI_CLK QUADSPI1 SPEED_HIGH
# Motors
PA0 TIM5_CH1 TIM5 PWM(1) GPIO(50) BIDIR # M1