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hwdef: fixed polarity of VDD_5V_PERIPH_EN on several boards 

we can tell these are incorrect as they init to LOW, and previously we
didn't have handling of VDD_5V_PERIPH_EN, so we know that LOW is
enabled or the boards would not have worked

this fixes GPS on Pixhawk1
This commit is contained in:
Andrew Tridgell 2023-03-17 09:06:15 +11:00 committed by Peter Barker
parent 6b2990813a
commit 32578b796b
6 changed files with 6 additions and 6 deletions
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2
libraries/AP_HAL_ChibiOS/hwdef/CubeYellow/hwdef.dat
View File

@ -172,7 +172,7 @@ PA7 SPI1_MOSI SPI1
# this defines an output pin which will default to output LOW. It is a
# pin that enables peripheral power on this board
PA8 VDD_5V_PERIPH_EN OUTPUT LOW
PA8 nVDD_5V_PERIPH_EN OUTPUT LOW
# this is the pin that senses USB being connected. It is an input pin
# setup as OPENDRAIN

2
libraries/AP_HAL_ChibiOS/hwdef/fmuv3-bdshot/hwdef.dat
View File

@ -210,7 +210,7 @@ PA7 SPI1_MOSI SPI1
# This defines an output pin which will default to output LOW. It is a
# pin that enables peripheral power on this board.
PA8 VDD_5V_PERIPH_EN OUTPUT LOW
PA8 nVDD_5V_PERIPH_EN OUTPUT LOW
# This is the pin that senses USB being connected. It is an input pin
# setup as OPENDRAIN.

2
libraries/AP_HAL_ChibiOS/hwdef/fmuv3/hwdef.dat
View File

@ -210,7 +210,7 @@ PA7 SPI1_MOSI SPI1
# This defines an output pin which will default to output LOW. It is a
# pin that enables peripheral power on this board.
PA8 VDD_5V_PERIPH_EN OUTPUT LOW
PA8 nVDD_5V_PERIPH_EN OUTPUT LOW
# This is the pin that senses USB being connected. It is an input pin
# setup as OPENDRAIN.

2
libraries/AP_HAL_ChibiOS/hwdef/mRoX21-777/hwdef.dat
View File

@ -172,7 +172,7 @@ PA7 SPI1_MOSI SPI1
# this defines an output pin which will default to output LOW. It is a
# pin that enables peripheral power on this board
PA8 VDD_5V_PERIPH_EN OUTPUT LOW
PA8 nVDD_5V_PERIPH_EN OUTPUT LOW
# this is the pin that senses USB being connected. It is an input pin
# setup as OPENDRAIN

2
libraries/AP_HAL_ChibiOS/hwdef/thepeach-k1/hwdef.dat
View File

@ -85,7 +85,7 @@ PA7 SPI1_MOSI SPI1
# This defines an output pin which will default to output LOW. It is a
# pin that enables peripheral power on this board.
PA8 VDD_5V_PERIPH_EN OUTPUT LOW
PA8 nVDD_5V_PERIPH_EN OUTPUT LOW
# This is the pin that senses USB being connected. It is an input pin
# setup as OPENDRAIN.

2
libraries/AP_HAL_ChibiOS/hwdef/thepeach-r1/hwdef.dat
View File

@ -85,7 +85,7 @@ PA7 SPI1_MOSI SPI1
# This defines an output pin which will default to output LOW. It is a
# pin that enables peripheral power on this board.
PA8 VDD_5V_PERIPH_EN OUTPUT LOW
PA8 nVDD_5V_PERIPH_EN OUTPUT LOW
# This is the pin that senses USB being connected. It is an input pin
# setup as OPENDRAIN.