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HAL_ChibiOS: fixed erasing of G4 dual-bank past 256k flash 

BKER needs to be set to bank number, lower 7 bits of page number in
PNB
This commit is contained in:
Andrew Tridgell 2024-05-09 21:05:53 +10:00
parent 65bf3adad7
commit 3050a8b0dc
1 changed files with 9 additions and 3 deletions
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12
libraries/AP_HAL_ChibiOS/hwdef/common/flash.c
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@ -520,10 +520,16 @@ bool stm32_flash_erasepage(uint32_t page)
FLASH->CR |= FLASH_CR_STRT; FLASH->CR |= FLASH_CR_STRT;
#elif defined(STM32G4) #elif defined(STM32G4)
FLASH->CR = FLASH_CR_PER; FLASH->CR = FLASH_CR_PER;
// rather oddly, PNB is a 7 bit field that the ref manual says can #ifdef FLASH_CR_BKER_Pos
// contain 8 bits we assume that for 512k single bank devices /*
// there is an 8th bit we assume dual bank mode, we set the bottom 7 bits of the page
into PNB and the 8th bit into BKER
*/
FLASH->CR |= (page&0x7F)<<FLASH_CR_PNB_Pos | (page>>7)<<FLASH_CR_BKER_Pos;
#else
// this is a single bank only varient
FLASH->CR |= page<<FLASH_CR_PNB_Pos; FLASH->CR |= page<<FLASH_CR_PNB_Pos;
#endif
FLASH->CR |= FLASH_CR_STRT; FLASH->CR |= FLASH_CR_STRT;
#elif defined(STM32L4PLUS) #elif defined(STM32L4PLUS)
FLASH->CR |= FLASH_CR_PER; FLASH->CR |= FLASH_CR_PER;