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HAL_ChibiOS: invalidate before read on rx, not on DMA setup 

more efficient, as we only invalidate what was used
This commit is contained in:
Andrew Tridgell 2019-02-14 07:21:29 +11:00
parent 071d5e01af
commit 231117e9b1
3 changed files with 4 additions and 6 deletions
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2
libraries/AP_HAL_ChibiOS/RCOutput.cpp
View File

@ -988,7 +988,7 @@ void RCOutput::send_pulses_DMAR(pwm_group &group, uint32_t buffer_length)
up with this great method.
*/
dmaStreamSetPeripheral(group.dma, &(group.pwm_drv->tim->DMAR));
cacheBufferInvalidate(group.dma_buffer, buffer_length);
cacheBufferFlush(group.dma_buffer, buffer_length);
dmaStreamSetMemory0(group.dma, group.dma_buffer);
dmaStreamSetTransactionSize(group.dma, buffer_length/sizeof(uint32_t));
dmaStreamSetFIFO(group.dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL);

3
libraries/AP_HAL_ChibiOS/SoftSigReader.cpp
View File

@ -55,7 +55,6 @@ bool SoftSigReader::attach_capture_timer(ICUDriver* icu_drv, icuchannel_t chan,
dmamode |= STM32_DMA_CR_PL(0);
dmamode |= STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_PSIZE_WORD |
STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
cacheBufferInvalidate(signal, SOFTSIG_BOUNCE_BUF_SIZE*4);
dmaStreamSetMemory0(dma, signal);
dmaStreamSetTransactionSize(dma, SOFTSIG_BOUNCE_BUF_SIZE);
dmaStreamSetMode(dma, dmamode);
@ -98,11 +97,11 @@ void SoftSigReader::_irq_handler(void* self, uint32_t flags)
// we need to restart the DMA as quickly as possible to prevent losing pulses, so we
// make a fixed length copy to a 2nd buffer. On the F100 this reduces the time with DMA
// disabled from 20us to under 1us
cacheBufferInvalidate(sig_reader->signal, SOFTSIG_BOUNCE_BUF_SIZE*4);
memcpy(sig_reader->signal2, sig_reader->signal, SOFTSIG_BOUNCE_BUF_SIZE*4);
//restart the DMA transfers
dmaStreamDisable(sig_reader->dma);
dmaStreamSetPeripheral(sig_reader->dma, &sig_reader->_icu_drv->tim->DMAR);
cacheBufferInvalidate(sig_reader->signal, SOFTSIG_BOUNCE_BUF_SIZE*4);
dmaStreamSetMemory0(sig_reader->dma, sig_reader->signal);
dmaStreamSetTransactionSize(sig_reader->dma, SOFTSIG_BOUNCE_BUF_SIZE);
dmaStreamSetMode(sig_reader->dma, sig_reader->dmamode);

5
libraries/AP_HAL_ChibiOS/UARTDriver.cpp
View File

@ -287,7 +287,6 @@ void UARTDriver::begin(uint32_t b, uint16_t rxS, uint16_t txS)
dmamode |= STM32_DMA_CR_CHSEL(STM32_DMA_GETCHANNEL(sdef.dma_rx_stream_id,
sdef.dma_rx_channel_id));
dmamode |= STM32_DMA_CR_PL(0);
cacheBufferInvalidate(rx_bounce_buf, RX_BOUNCE_BUFSIZE);
dmaStreamSetMemory0(rxdma, rx_bounce_buf);
dmaStreamSetTransactionSize(rxdma, RX_BOUNCE_BUFSIZE);
dmaStreamSetMode(rxdma, dmamode | STM32_DMA_CR_DIR_P2M |
@ -414,12 +413,12 @@ void UARTDriver::rxbuff_full_irq(void* self, uint32_t flags)
}
}
cacheBufferInvalidate(uart_drv->rx_bounce_buf, len);
uart_drv->_readbuf.write(uart_drv->rx_bounce_buf, len);
uart_drv->receive_timestamp_update();
//restart the DMA transfers
cacheBufferInvalidate(uart_drv->rx_bounce_buf, RX_BOUNCE_BUFSIZE);
dmaStreamSetMemory0(uart_drv->rxdma, uart_drv->rx_bounce_buf);
dmaStreamSetTransactionSize(uart_drv->rxdma, RX_BOUNCE_BUFSIZE);
dmaStreamEnable(uart_drv->rxdma);
@ -875,6 +874,7 @@ void UARTDriver::_timer_tick(void)
if (!(rxdma->stream->CR & STM32_DMA_CR_EN)) {
uint8_t len = RX_BOUNCE_BUFSIZE - dmaStreamGetTransactionSize(rxdma);
if (len != 0) {
cacheBufferInvalidate(rx_bounce_buf, len);
_readbuf.write(rx_bounce_buf, len);
receive_timestamp_update();
@ -884,7 +884,6 @@ void UARTDriver::_timer_tick(void)
}
//DMA disabled by idle interrupt never got a chance to be handled
//we will enable it here
cacheBufferInvalidate(rx_bounce_buf, RX_BOUNCE_BUFSIZE);
dmaStreamSetMemory0(rxdma, rx_bounce_buf);
dmaStreamSetTransactionSize(rxdma, RX_BOUNCE_BUFSIZE);
dmaStreamEnable(rxdma);