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Tools: decode_ISCR.py: flake8-clean
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@ -1,6 +1,8 @@
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#!/usr/bin/env python
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#!/usr/bin/env python
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'''
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'''
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decode an stm32 ICSR register value
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decode an stm32 ICSR register value
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AP_FLAKE8_CLEAN
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'''
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'''
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import sys
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import sys
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@ -12,7 +14,9 @@ class DecodeICSR(object):
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# page 225
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# page 225
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def __init__(self):
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def __init__(self):
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# this ICSR-bit-assignment-table table also looks valid for M7 - page 195 of dm00237416-stm32f7-series-and-stm32h7-series-cortexm7-processor-programming-manual-stmicroelectronics.pdf
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# this ICSR-bit-assignment-table table also looks valid for M7
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# - page 195 of
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# dm00237416-stm32f7-series-and-stm32h7-series-cortexm7-processor-programming-manual-stmicroelectronics.pdf
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self.M4_BITS = [
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self.M4_BITS = [
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("0-8", "VECTACTIVE", self.decoder_m4_vectactive),
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("0-8", "VECTACTIVE", self.decoder_m4_vectactive),
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("9-10", "RESERVED1", None),
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("9-10", "RESERVED1", None),
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