2019-03-22 23:32:56 -03:00
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#pragma once
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#include <stdint.h>
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#include <AP_Common/AP_Common.h>
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2018-05-10 21:37:01 -03:00
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/*
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common protocol definitions between AP_IOMCU and iofirmware
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*/
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2018-10-31 19:06:08 -03:00
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// 22 is enough for the rc_input page in one transfer
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#define PKT_MAX_REGS 22
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2018-05-10 21:37:01 -03:00
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#define IOMCU_MAX_CHANNELS 16
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//#define IOMCU_DEBUG
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struct PACKED IOPacket {
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uint8_t count:6;
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uint8_t code:2;
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uint8_t crc;
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uint8_t page;
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uint8_t offset;
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uint16_t regs[PKT_MAX_REGS];
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// get packet size in bytes
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uint8_t get_size(void) const
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{
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return count*2 + 4;
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}
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};
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/*
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values for pkt.code
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*/
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enum iocode {
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// read types
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CODE_READ = 0,
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CODE_WRITE = 1,
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// reply codes
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CODE_SUCCESS = 0,
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CODE_CORRUPT = 1,
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CODE_ERROR = 2
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};
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// IO pages
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enum iopage {
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PAGE_CONFIG = 0,
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PAGE_STATUS = 1,
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PAGE_ACTUATORS = 2,
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PAGE_SERVOS = 3,
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PAGE_RAW_RCIN = 4,
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PAGE_RCIN = 5,
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PAGE_RAW_ADC = 6,
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PAGE_PWM_INFO = 7,
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PAGE_SETUP = 50,
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PAGE_DIRECT_PWM = 54,
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PAGE_FAILSAFE_PWM = 55,
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PAGE_SAFETY_PWM = 108,
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PAGE_MIXING = 200,
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};
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// setup page registers
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#define PAGE_REG_SETUP_FEATURES 0
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#define P_SETUP_FEATURES_SBUS1_OUT 1
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#define P_SETUP_FEATURES_SBUS2_OUT 2
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#define P_SETUP_FEATURES_PWM_RSSI 4
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#define P_SETUP_FEATURES_ADC_RSSI 8
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#define P_SETUP_FEATURES_ONESHOT 16
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#define P_SETUP_FEATURES_BRUSHED 32
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#define PAGE_REG_SETUP_ARMING 1
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#define P_SETUP_ARMING_IO_ARM_OK (1<<0)
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#define P_SETUP_ARMING_FMU_ARMED (1<<1)
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#define P_SETUP_ARMING_RC_HANDLING_DISABLED (1<<6)
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#define P_SETUP_ARMING_SAFETY_DISABLE_ON (1 << 11) // disable use of safety button for safety off->on
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#define P_SETUP_ARMING_SAFETY_DISABLE_OFF (1 << 12) // disable use of safety button for safety on->off
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#define PAGE_REG_SETUP_PWM_RATE_MASK 2
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#define PAGE_REG_SETUP_DEFAULTRATE 3
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#define PAGE_REG_SETUP_ALTRATE 4
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#define PAGE_REG_SETUP_REBOOT_BL 10
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#define PAGE_REG_SETUP_CRC 11
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#define PAGE_REG_SETUP_SBUS_RATE 19
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#define PAGE_REG_SETUP_IGNORE_SAFETY 20 /* bitmask of surfaces to ignore the safety status */
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#define PAGE_REG_SETUP_HEATER_DUTY_CYCLE 21
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#define PAGE_REG_SETUP_DSM_BIND 22
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// config page registers
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#define PAGE_CONFIG_PROTOCOL_VERSION 0
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#define PAGE_CONFIG_PROTOCOL_VERSION2 1
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#define IOMCU_PROTOCOL_VERSION 4
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#define IOMCU_PROTOCOL_VERSION2 10
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// magic value for rebooting to bootloader
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#define REBOOT_BL_MAGIC 14662
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#define PAGE_REG_SETUP_FORCE_SAFETY_OFF 12
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#define PAGE_REG_SETUP_FORCE_SAFETY_ON 14
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#define FORCE_SAFETY_MAGIC 22027
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struct page_config {
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uint16_t protocol_version;
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uint16_t protocol_version2;
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};
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struct page_reg_status {
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uint16_t freemem;
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uint32_t timestamp_ms;
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uint16_t vservo;
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uint16_t vrssi;
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uint32_t num_errors;
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uint32_t total_pkts;
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uint8_t flag_safety_off;
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uint8_t err_crc;
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uint8_t err_bad_opcode;
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uint8_t err_read;
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uint8_t err_write;
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uint8_t err_uart;
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};
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2019-08-13 21:07:48 -03:00
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struct page_rc_input {
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uint8_t count;
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uint8_t flags_failsafe:1;
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uint8_t flags_rc_ok:1;
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uint8_t rc_protocol;
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uint16_t pwm[IOMCU_MAX_CHANNELS];
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};
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/*
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data for mixing on FMU failsafe
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*/
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struct page_mixing {
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uint16_t servo_min[IOMCU_MAX_CHANNELS];
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uint16_t servo_max[IOMCU_MAX_CHANNELS];
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uint16_t servo_trim[IOMCU_MAX_CHANNELS];
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uint8_t servo_function[IOMCU_MAX_CHANNELS];
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uint8_t servo_reversed[IOMCU_MAX_CHANNELS];
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// RC input arrays are in AETR order
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uint16_t rc_min[4];
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uint16_t rc_max[4];
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uint16_t rc_trim[4];
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uint8_t rc_reversed[IOMCU_MAX_CHANNELS];
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uint8_t rc_channel[4];
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2018-10-31 00:16:17 -03:00
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// gain for elevon and vtail mixing, x1000
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uint16_t mixing_gain;
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2018-10-30 21:07:47 -03:00
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// channel which when high forces mixer
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int8_t rc_chan_override;
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2018-10-30 23:10:51 -03:00
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// is the throttle an angle input?
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uint8_t throttle_is_angle;
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2018-10-31 01:09:49 -03:00
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// mask of channels which are pure manual in override
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uint16_t manual_rc_mask;
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2018-10-30 21:07:47 -03:00
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// enabled needs to be 1 to enable mixing
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uint8_t enabled;
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uint8_t pad; // pad to even size
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};
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