2019-09-11 23:48:37 -03:00
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//----------------------------------------------------------------------------------
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// low level driver for the Beken BK2425 radio on SPI
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// Note: Under ChiBios the knowledge of which pins are which is not in the driver.
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// But ultimately comes from hwdef.dat
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//----------------------------------------------------------------------------------
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#pragma once
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#include <AP_HAL/AP_HAL.h>
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#if defined(HAL_RCINPUT_WITH_AP_RADIO) && CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_CHIBIOS_SKYVIPER_F412
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#define SUPPORT_BK_DEBUG_PINS 0 // 0=UART6 is for GPS, 1=UART6 is debug gpio
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#define TX_SPEED 250u // Default transmit speed in kilobits per second.
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/** Channel hopping parameters. Values are in MHz from 2400Mhz. */
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enum CHANNEL_MHZ_e {
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CHANNEL_MIN_PHYSICAL = 0, ///< Minimum physical channel that is possible
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CHANNEL_MAX_PHYSICAL = 83, ///< Maximum physical channel that is possible
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CHANNEL_FCC_LOW = 10, ///< Minimum physical channel that will pass the FCC tests
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CHANNEL_FCC_HIGH = 72, ///< Maximum physical channel that will pass the FCC tests
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CHANNEL_FCC_MID = 41, ///< A representative physical channel
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};
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enum {
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CHANNEL_COUNT_LOGICAL = 16, ///< The maximum number of entries in each frequency table
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CHANNEL_BASE_TABLE = 0, ///< The table used for non wifi boards
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CHANNEL_SAFE_TABLE = 3, ///< A table that will receive packets even if wrong
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CHANNEL_NUM_TABLES = 6, ///< The number of tables
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CHANNEL_COUNT_TEST = 16, ///< The number of test mode tables
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};
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// ----------------------------------------------------------------------------
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// Packet format definition
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// ----------------------------------------------------------------------------
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/** The type of packets being sent between controller and drone */
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enum BK_PKT_TYPE_E {
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BK_PKT_TYPE_INVALID = 0, ///< Invalid packet from empty packets or bad CRC
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BK_PKT_TYPE_CTRL_FOUND = 0x10, ///< (Tx->Drone) User control - known receiver
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BK_PKT_TYPE_CTRL_LOST = 0x11, ///< (Tx->Drone) User control - unknown receiver
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BK_PKT_TYPE_BIND_AUTO = 0x12, ///< (Tx->Drone) Tell drones this tx is broadcasting
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BK_PKT_TYPE_TELEMETRY = 0x13, ///< (Drone->Tx) Send telemetry to tx
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BK_PKT_TYPE_DFU = 0x14, ///< (Drone->Tx) Send new firmware to tx
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BK_PKT_TYPE_BIND_MANUAL = 0x15, ///< (Tx->Drone) Tell drones this tx is broadcasting
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BK_PKT_TYPE_TUNE = 0x16, ///< (Drone->Tx) Send musical tune to tx
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};
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typedef uint8_t BK_PKT_TYPE;
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/** A bitset of the buttons on this controller. */
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enum button_bits {
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BUTTON_NONE = 0x00, ///< No buttons are held
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BUTTON_RIGHT = 0x01, ///< SW1 = The right button (mode)
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BUTTON_LEFT = 0x02, ///< SW2 = The left button (launch/land)
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BUTTON_MIDDLE = 0x04, ///< SW3 = The middle button (GPS)
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BUTTON_LEFT_SHOULDER = 0x08, ///< SW4 = The left shoulder button (stunt)
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BUTTON_RIGHT_SHOULDER = 0x10, ///< SW5 = The right shoulder button (video)
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BUTTON_POWER = 0x20, ///< SW6 = The top button (POWER)
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};
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/** The type of info being sent in control packets */
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enum BK_INFO_TYPE_E {
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BK_INFO_MIN = 1,
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BK_INFO_FW_VER = 1,
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BK_INFO_DFU_RX = 2,
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BK_INFO_FW_CRC_LO = 3,
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BK_INFO_FW_CRC_HI = 4,
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BK_INFO_FW_YM = 5,
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BK_INFO_FW_DAY = 6,
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BK_INFO_MODEL = 7,
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BK_INFO_PPS = 8,
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BK_INFO_BATTERY = 9,
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BK_INFO_COUNTDOWN = 10,
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BK_INFO_HOPPING0 = 11,
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BK_INFO_HOPPING1 = 12,
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BK_INFO_DRONEID0 = 13,
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BK_INFO_DRONEID1 = 14,
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BK_INFO_MAX
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};
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typedef uint8_t BK_INFO_TYPE;
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/** Data for packets that are not droneid packets
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Onair order = little-endian */
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typedef struct packetDataDeviceCtrl_s {
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uint8_t roll; ///< 2: Low 8 bits of the roll joystick
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uint8_t pitch; ///< 3: Low 8 bits of the pitch joystick
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uint8_t throttle; ///< 4: Low 8 bits of the throttle joystick
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uint8_t yaw; ///< 5: Low 8 bits of the yaw joystick
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uint8_t msb; ///< 6: High 2 bits of roll (7..6), pitch (5..4), throttle (3..2), yaw (1..0)
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uint8_t buttons_held; ///< 7: The buttons
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uint8_t buttons_toggled; ///< 8: The buttons
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uint8_t data_type; ///< 9: Type of extra data being sent
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uint8_t data_value_lo; ///< 10: Value of extra data being sent
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uint8_t data_value_hi; ///< 11: Value of extra data being sent
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} packetDataDeviceCtrl;
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enum { SZ_ADDRESS = 5 }; ///< Size of address for transmission packets (40 bits)
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enum { SZ_CRC_GUID = 4 }; ///< Size of UUID for drone (32 bits)
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enum { SZ_DFU = 16 }; ///< Size of DFU packets
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/** Data for packets that are binding packets
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Onair order = little-endian */
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typedef struct packetDataDeviceBind_s {
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uint8_t bind_address[SZ_ADDRESS]; ///< The address being used by control packets
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uint8_t hopping; ///< The hopping table in use for this connection
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uint8_t droneid[SZ_CRC_GUID]; ///<
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} packetDataDeviceBind;
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/** Data structure for data packet transmitted from device (controller) to host (drone) */
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typedef struct packetDataDevice_s {
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BK_PKT_TYPE packetType; ///< 0: The packet type
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uint8_t channel; ///< 1: Next channel I will broadcast on
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union packetDataDevice_u { ///< The variant part of the packets
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packetDataDeviceCtrl ctrl; ///< Control packets
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packetDataDeviceBind bind; ///< Binding packets
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} u;
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} packetFormatRx;
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/** Data structure for data packet transmitted from host (drone) to device (controller) */
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typedef struct packetDataDrone_s {
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BK_PKT_TYPE packetType; ///< 0: The packet type
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uint8_t channel; ///< 1: Next channel I will broadcast on
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uint8_t pps; ///< 2: Packets per second the drone received
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uint8_t flags; ///< 3: Flags
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uint8_t droneid[SZ_CRC_GUID]; ///< 4...7: CRC of the drone
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uint8_t flight_mode; ///< 8:
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uint8_t wifi; ///< 9: Wifi channel + 24 * tx power.
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uint8_t note_adjust; ///< 10: note adjust for the tx buzzer (should this be sent so often?)
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uint8_t hopping; ///< 11: The adapative hopping byte we want to use
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} packetFormatTx;
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typedef struct packetDataDfu_s {
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BK_PKT_TYPE packetType; ///< 0: The packet type
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uint8_t channel; ///< 1: Next channel I will broadcast on
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uint8_t address_lo; ///< 2:
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uint8_t address_hi; ///< 3:
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uint8_t data[SZ_DFU]; ///< 4...19:
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} packetFormatDfu;
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// ----------------------------------------------------------------------------
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// BK2425 chip definition
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// ----------------------------------------------------------------------------
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//----------------------------------------------------------------------------------
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/** SPI register commands for the BK2425 and nrf24L01+ chips */
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typedef enum {
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// General commands
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BK_REG_MASK = 0x1F, // The range of registers that can be read and written
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BK_READ_REG = 0x00, // Define read command to register (0..1F)
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BK_WRITE_REG = 0x20, // Define write command to register (0..1F)
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BK_ACTIVATE_CMD = 0x50,
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BK_R_RX_PL_WID_CMD = 0x60,
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BK_RD_RX_PLOAD = 0x61, // Define RX payload register address
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BK_WR_TX_PLOAD = 0xA0, // Define TX payload register address
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BK_W_ACK_PAYLOAD_CMD = 0xA8, // (nrf: +pipe 0..7)
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BK_W_TX_PAYLOAD_NOACK_CMD = 0xB0,
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BK_FLUSH_TX = 0xE1, // Define flush TX register command
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BK_FLUSH_RX = 0xE2, // Define flush RX register command
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BK_REUSE_TX_PL = 0xE3, // Define reuse TX payload register command
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BK_NOP = 0xFF, // Define No Operation, might be used to read status register
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// BK2425 bank 0 register addresses
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BK_CONFIG = 0x00, // 'Config' register address
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BK_EN_AA = 0x01, // 'Enable Auto Acknowledgment' register address
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BK_EN_RXADDR = 0x02, // 'Enabled RX addresses' register address
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BK_SETUP_AW = 0x03, // 'Setup address width' register address
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BK_SETUP_RETR = 0x04, // 'Setup Auto. Retrans' register address
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BK_RF_CH = 0x05, // 'RF channel' register address
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BK_RF_SETUP = 0x06, // 'RF setup' register address
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BK_STATUS = 0x07, // 'Status' register address
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BK_OBSERVE_TX = 0x08, // 'Observe TX' register address (lost packets, retransmitted packets on this frequency)
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BK_CD = 0x09, // 'Carrier Detect' register address
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BK_RX_ADDR_P0 = 0x0A, // 'RX address pipe0' register address (5 bytes)
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BK_RX_ADDR_P1 = 0x0B, // 'RX address pipe1' register address (5 bytes)
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BK_RX_ADDR_P2 = 0x0C, // 'RX address pipe2' register address (1 byte)
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BK_RX_ADDR_P3 = 0x0D, // 'RX address pipe3' register address (1 byte)
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BK_RX_ADDR_P4 = 0x0E, // 'RX address pipe4' register address (1 byte)
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BK_RX_ADDR_P5 = 0x0F, // 'RX address pipe5' register address (1 byte)
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BK_TX_ADDR = 0x10, // 'TX address' register address (5 bytes)
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BK_RX_PW_P0 = 0x11, // 'RX payload width, pipe0' register address
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BK_RX_PW_P1 = 0x12, // 'RX payload width, pipe1' register address
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BK_RX_PW_P2 = 0x13, // 'RX payload width, pipe2' register address
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BK_RX_PW_P3 = 0x14, // 'RX payload width, pipe3' register address
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BK_RX_PW_P4 = 0x15, // 'RX payload width, pipe4' register address
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BK_RX_PW_P5 = 0x16, // 'RX payload width, pipe5' register address
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BK_FIFO_STATUS = 0x17, // 'FIFO Status Register' register address
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BK_DYNPD = 0x1c, // 'Enable dynamic payload length' register address
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BK_FEATURE = 0x1d, // 'Feature' register address
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BK_PAYLOAD_WIDTH = 0x1f, // 'payload length of 256 bytes modes register address
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// BK2425 bank 1 register addresses
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BK2425_R1_4 = 0x04,
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BK2425_R1_5 = 0x05,
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BK2425_R1_WHOAMI = 0x08, // Register to read that contains the chip id
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BK2425_R1_12 = 0x0C, // PLL speed 120 or 130us
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BK2425_R1_13 = 0x0D,
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BK2425_R1_14 = 0x0E,
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} BK_SPI_CMD;
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//----------------------------------------------------------------------------------
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// Chip Status Byte
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//----------------------------------------------------------------------------------
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enum {
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BK_CHIP_ID_BK2425 = 0x63, // The expected value of reading BK2425_R1_WHOAMI
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};
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// Meanings of the BK_STATUS register
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enum {
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BK_STATUS_RBANK = 0x80, // Register bank 1 is in use
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BK_STATUS_RX_DR = 0x40, // Data ready
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BK_STATUS_TX_DS = 0x20, // Data sent
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BK_STATUS_MAX_RT = 0x10, // Max retries failed
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BK_STATUS_RX_MASK = 0x0E, // Mask for the receptions bit
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BK_STATUS_RX_EMPTY = 0x0E,
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BK_STATUS_RX_P_5 = 0x0A, // Data pipe 5 has some data ready
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BK_STATUS_RX_P_4 = 0x08, // Data pipe 4 has some data ready
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BK_STATUS_RX_P_3 = 0x06, // Data pipe 3 has some data ready
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BK_STATUS_RX_P_2 = 0x04, // Data pipe 2 has some data ready
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BK_STATUS_RX_P_1 = 0x02, // Data pipe 1 has some data ready
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BK_STATUS_RX_P_0 = 0x00, // Data pipe 0 has some data ready
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BK_STATUS_TX_FULL = 0x01 // Tx buffer full
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};
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// Meanings of the FIFO_STATUS register
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enum {
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BK_FIFO_STATUS_TX_REUSE = 0x40,
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BK_FIFO_STATUS_TX_FULL = 0x20,
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BK_FIFO_STATUS_TX_EMPTY = 0x10,
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BK_FIFO_STATUS_RX_FULL = 0x02,
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BK_FIFO_STATUS_RX_EMPTY = 0x01
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};
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// Meanings of the BK_CONFIG register
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enum {
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BK_CONFIG_MASK_RX_DR = 0x40, // Mask interrupt caused by RX_DR
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BK_CONFIG_MASK_TX_DS = 0x20, // Mask interrupt caused by TX_DS
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BK_CONFIG_MASK_MAX_RT = 0x10, // Mask interrupt caused by MAX_RT
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BK_CONFIG_EN_CRC = 0x08, // Enable CRC. Forced high if one of the bits in the EN_AA is high
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BK_CONFIG_CRCO = 0x04, // CRC encoding scheme (0=8 bits, 1=16 bits)
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BK_CONFIG_PWR_UP = 0x02, // POWER UP
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BK_CONFIG_PRIM_RX = 0x01, // Receive/transmit
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};
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enum {
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BK_FEATURE_EN_DPL = 0x04, //
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BK_FEATURE_EN_ACK_PAY = 0x02, //
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BK_FEATURE_EN_DYN_ACK = 0x01, //
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};
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// (Lets make it one radio interface for both projects)
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/** The baud rate of the GFSK modulation */
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typedef enum ITX_SPEED_e {
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ITX_250, ///< 250kbps (slowest but furthest range)
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ITX_1000, ///< 1000kbps (balanced)
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ITX_2000, ///< 2000kbps (fastest hence least congested)
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ITX_CARRIER, ///< 0kbps (constant carrier wave)
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ITX_MAX
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} ITX_SPEED;
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enum {
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PACKET_LENGTH_RX_CTRL = 12,
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PACKET_LENGTH_RX_BIND = 12,
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PACKET_LENGTH_RX_MAX = 12,
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PACKET_LENGTH_TX_TELEMETRY = 12,
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PACKET_LENGTH_TX_DFU = 20,
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PACKET_LENGTH_TX_MAX = 20,
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};
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// Note that bank 1 registers 0...8 are MSB first; others are LSB first
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#define PLL_SPEED { BK2425_R1_12, 0x00,0x12,0x73,0x05 } // 0x00127305ul, // PLL locking time 130us compatible with nRF24L01;
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// In the array Bank1_Reg0_13[],all the register values are the byte reversed!
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enum {
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IREG1_4,
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IREG1_5,
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IREG1_12,
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IREG1_13,
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IREG1_4A,
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IREG_MAX
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};
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#define BK_MAX_PACKET_LEN 32 // max value is 32 bytes
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#define BK_RCV_TIMEOUT 30
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//----------------------------------------------------------------------------------
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// Translate output power into a number
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// must match up with the table RegPower[]
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#define OUTPUT_POWER_REG6_0 0 // -25dB
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#define OUTPUT_POWER_REG6_1 0 // -18dB
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#define OUTPUT_POWER_REG6_2 1 // -18dB
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#define OUTPUT_POWER_REG6_3 1 // -12dB
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#define OUTPUT_POWER_REG6_4 1 // -12dB
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#define OUTPUT_POWER_REG6_5 2 // -7dB
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#define OUTPUT_POWER_REG6_6 3 // -1dB
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#define OUTPUT_POWER_REG6_7 3 // +4dB
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// Register 4 in bank 1 only applies to Beken chip
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#define OUTPUT_POWER_REG4_0 0 // -25dB
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#define OUTPUT_POWER_REG4_1 3 // -18dB
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#define OUTPUT_POWER_REG4_2 0 // -18dB
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#define OUTPUT_POWER_REG4_3 3 // -12dB
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#define OUTPUT_POWER_REG4_4 2 // -12dB
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#define OUTPUT_POWER_REG4_5 0 // -7dB
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#define OUTPUT_POWER_REG4_6 0 // -1dB
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#define OUTPUT_POWER_REG4_7 7 // +4dB
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// Generic support
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#define TOKENPASTE(x, y) x ## y
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#define TOKENPASTE2(x, y) TOKENPASTE(x, y)
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// The default register values that are for the default power setting
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#define DEFAULT_OUTPUT_REG6 TOKENPASTE2(OUTPUT_POWER_REG6_,DEFAULT_OUTPUT_POWER)
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#define DEFAULT_OUTPUT_REG4 TOKENPASTE2(OUTPUT_POWER_REG4_,DEFAULT_OUTPUT_POWER)
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/** Parameters used by the fcc pretests */
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typedef struct FccParams_s {
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uint8_t fcc_mode; ///< The value (0..6) last set by the user that we are using. Non-zero iff we are sending test signals
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bool scan_mode; ///< true for scanning, false for fixed frequencies
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bool CW_mode; ///< true for carrier wave, false for packets
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bool disable_crc_mode; ///< false for CRCs enabled, true for CRCs ignored on reception
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uint8_t scan_count; ///< In scan mode, packet count before incrementing scan
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uint8_t channel; ///< Current frequency 8..70
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uint8_t power; ///< Current power 1..8
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bool disable_crc; ///< true=crc is physically disabled
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uint8_t factory_mode; ///< factory test mode 0..8
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bool enable_cd; ///< enable carrier detect
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bool last_cd; ///< last carrier detect on a packet received
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} FccParams;
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typedef enum BkRadioMode_e {
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BKRADIO_SLEEP,
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BKRADIO_IDLE,
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BKRADIO_TX,
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BKRADIO_RX,
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BKRADIO_STANDBY1, // Not visible to the code yet
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BKRADIO_STANDBY2, // Not visible to the code yet
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} BkRadioMode;
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//----------------------------------------------------------------------------------
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// BEKEN driver class
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class Radio_Beken
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{
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public:
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// Generic functions
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Radio_Beken(AP_HAL::OwnPtr<AP_HAL::SPIDevice> _dev);
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bool lock_bus(void)
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{
|
2020-02-27 05:03:47 -04:00
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dev->get_semaphore()->take_blocking();
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return true;
|
2019-09-11 23:48:37 -03:00
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}
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void unlock_bus(void)
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{
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dev->get_semaphore()->give();
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}
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// Raw SPI access functions
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void ReadRegisterMulti(uint8_t address, uint8_t *data, uint8_t len);
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void WriteRegisterMulti(uint8_t address, const uint8_t *data, uint8_t len);
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// Low-level Beken functions
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uint8_t ReadStatus(void);
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uint8_t ReadReg(uint8_t reg);
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uint8_t Strobe(uint8_t address);
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void SetRBank(uint8_t bank);
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void WriteReg(uint8_t address, uint8_t data);
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void WriteRegisterMultiBank1(uint8_t address, const uint8_t *data, uint8_t len);
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// High-level Beken functions
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|
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void SetPower(uint8_t power);
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void SetChannel(uint8_t channel); // Sets the physical channel
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|
void SetCwMode(uint8_t cw);
|
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void SetCrcMode(uint8_t disable_crc); // non-zero means crc is ignored
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|
|
void SetFactoryMode(uint8_t factory);
|
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|
|
bool Reset(void);
|
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|
|
void SwitchToRxMode(void);
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|
|
void SwitchToTxMode(void);
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|
|
void SwitchToIdleMode(void);
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|
|
void SwitchToSleepMode(void);
|
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|
|
void InitBank0Registers(ITX_SPEED spd);
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|
|
|
void InitBank1Registers(ITX_SPEED spd);
|
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|
|
void SetAddresses(const uint8_t* txaddr); // Set the rx and tx addresses
|
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|
|
bool ClearAckOverflow(void);
|
|
|
|
bool SendPacket(uint8_t type, const uint8_t* pbuf, uint8_t len);
|
|
|
|
void DelayCE(void);
|
|
|
|
void DumpRegisters(void);
|
|
|
|
bool WasTxMode(void);
|
|
|
|
bool WasRxMode(void);
|
|
|
|
void ResetAddress(void);
|
|
|
|
void EnableCarrierDetect(bool bEnable);
|
|
|
|
bool CarrierDetect(void);
|
|
|
|
|
|
|
|
// Visible public variables (naughty)
|
|
|
|
volatile uint8_t bkReady; // initialised in AP_Radio_bk2425.h radio_init() at the very end. Similar to a semaphore.
|
|
|
|
static ITX_SPEED gTxSpeed;
|
|
|
|
FccParams fcc;
|
|
|
|
packetFormatTx pktDataTx; // Packet data to send (telemetry)
|
|
|
|
packetFormatDfu pktDataDfu; // Packet data to send (DFU)
|
|
|
|
uint8_t TX_Address[5]; // For sending telemetry and DFU
|
|
|
|
|
|
|
|
private:
|
|
|
|
AP_HAL::OwnPtr<AP_HAL::SPIDevice> dev;
|
|
|
|
uint8_t bFreshData; // Have we received a packet since we last processed one
|
|
|
|
uint32_t numTxPackets;
|
|
|
|
packetFormatRx pktDataRx; // Last valid packet that has been received
|
|
|
|
packetFormatRx pktDataRecv; // Packet data in process of being received
|
|
|
|
uint8_t lastTxChannel; // 0..CHANNEL_COUNT_LOGICAL
|
|
|
|
uint8_t RX0_Address[5]; // The data address
|
|
|
|
uint8_t RX1_Address[5]; // The fixed binding address
|
|
|
|
BkRadioMode bkMode;
|
|
|
|
};
|
|
|
|
|
|
|
|
#endif
|