2017-12-26 19:03:21 -04:00
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/*
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implement protocol for controlling an IO microcontroller
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For bootstrapping this will initially implement the px4io protocol,
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but will later move to an ArduPilot specific protocol
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*/
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#include "AP_IOMCU.h"
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2018-01-02 01:47:42 -04:00
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#if HAL_WITH_IO_MCU
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2017-12-27 03:24:15 -04:00
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#include <AP_Math/AP_Math.h>
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#include <AP_Math/crc.h>
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2018-04-13 03:17:08 -03:00
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#include <AP_BoardConfig/AP_BoardConfig.h>
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2018-04-14 08:09:11 -03:00
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#include <AP_ROMFS/AP_ROMFS.h>
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#include <AP_Math/crc.h>
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2017-12-26 19:03:21 -04:00
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extern const AP_HAL::HAL &hal;
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#define PKT_MAX_REGS 32
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2018-04-13 18:00:26 -03:00
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//#define IOMCU_DEBUG
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2017-12-26 19:03:21 -04:00
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struct PACKED IOPacket {
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2017-12-27 03:24:15 -04:00
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uint8_t count:6;
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uint8_t code:2;
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2017-12-26 19:03:21 -04:00
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uint8_t crc;
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uint8_t page;
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uint8_t offset;
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uint16_t regs[PKT_MAX_REGS];
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2017-12-27 03:24:15 -04:00
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// get packet size in bytes
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uint8_t get_size(void) const {
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return count*2 + 4;
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}
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};
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/*
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values for pkt.code
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*/
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enum iocode {
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// read types
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CODE_READ = 0,
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CODE_WRITE = 1,
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// reply codes
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CODE_SUCCESS = 0,
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CODE_CORRUPT = 1,
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CODE_ERROR = 2
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};
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// IO pages
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enum iopage {
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PAGE_CONFIG = 0,
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PAGE_STATUS = 1,
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PAGE_ACTUATORS = 2,
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PAGE_SERVOS = 3,
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PAGE_RAW_RCIN = 4,
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PAGE_RCIN = 5,
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PAGE_RAW_ADC = 6,
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PAGE_PWM_INFO = 7,
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PAGE_SETUP = 50,
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PAGE_DIRECT_PWM = 54,
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2018-04-14 00:54:04 -03:00
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PAGE_DISARMED_PWM = 108,
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2017-12-26 19:03:21 -04:00
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};
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2017-12-27 03:24:15 -04:00
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// pending IO events to send, used as an event mask
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enum ioevents {
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2017-12-27 05:15:55 -04:00
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IOEVENT_INIT=1,
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IOEVENT_SEND_PWM_OUT,
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2017-12-27 03:24:15 -04:00
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IOEVENT_SET_DISARMED_PWM,
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IOEVENT_SET_FAILSAFE_PWM,
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IOEVENT_FORCE_SAFETY_OFF,
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IOEVENT_FORCE_SAFETY_ON,
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IOEVENT_SET_ONESHOT_ON,
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2017-12-27 05:15:55 -04:00
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IOEVENT_SET_RATES,
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2017-12-27 18:26:11 -04:00
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IOEVENT_GET_RCIN,
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2017-12-31 22:28:59 -04:00
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IOEVENT_ENABLE_SBUS,
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2018-01-03 02:25:30 -04:00
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IOEVENT_SET_HEATER_TARGET,
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2018-01-12 23:52:29 -04:00
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IOEVENT_SET_DEFAULT_RATE,
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2018-04-14 00:54:04 -03:00
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IOEVENT_SET_SAFETY_MASK,
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2017-12-26 19:03:21 -04:00
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};
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2017-12-27 03:24:15 -04:00
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// setup page registers
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2017-12-31 22:28:59 -04:00
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#define PAGE_REG_SETUP_FEATURES 0
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#define P_SETUP_FEATURES_SBUS1_OUT 1
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#define P_SETUP_FEATURES_SBUS2_OUT 2
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#define P_SETUP_FEATURES_PWM_RSSI 4
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#define P_SETUP_FEATURES_ADC_RSSI 8
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#define P_SETUP_FEATURES_ONESHOT 16
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2017-12-27 03:24:15 -04:00
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#define PAGE_REG_SETUP_ARMING 1
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2017-12-27 05:15:55 -04:00
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#define P_SETUP_ARMING_IO_ARM_OK (1<<0)
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#define P_SETUP_ARMING_FMU_ARMED (1<<1)
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2017-12-31 22:28:59 -04:00
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#define P_SETUP_ARMING_RC_HANDLING_DISABLED (1<<6)
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2018-04-13 03:17:08 -03:00
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#define P_SETUP_ARMING_SAFETY_DISABLE_ON (1 << 11) // disable use of safety button for safety off->on
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#define P_SETUP_ARMING_SAFETY_DISABLE_OFF (1 << 12) // disable use of safety button for safety on->off
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2017-12-27 05:15:55 -04:00
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#define PAGE_REG_SETUP_PWM_RATE_MASK 2
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#define PAGE_REG_SETUP_DEFAULTRATE 3
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#define PAGE_REG_SETUP_ALTRATE 4
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2018-04-14 08:09:11 -03:00
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#define PAGE_REG_SETUP_REBOOT_BL 10
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#define PAGE_REG_SETUP_CRC 11
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2017-12-31 22:28:59 -04:00
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#define PAGE_REG_SETUP_SBUS_RATE 19
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2018-04-14 00:54:04 -03:00
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#define PAGE_REG_SETUP_IGNORE_SAFETY 20 /* bitmask of surfaces to ignore the safety status */
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2018-01-03 02:25:30 -04:00
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#define PAGE_REG_SETUP_HEATER_DUTY_CYCLE 21
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2017-12-27 03:24:15 -04:00
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2018-04-14 08:09:11 -03:00
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// magic value for rebooting to bootloader
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#define REBOOT_BL_MAGIC 14662
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2017-12-27 03:24:15 -04:00
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#define PAGE_REG_SETUP_FORCE_SAFETY_OFF 12
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#define PAGE_REG_SETUP_FORCE_SAFETY_ON 14
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#define FORCE_SAFETY_MAGIC 22027
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AP_IOMCU::AP_IOMCU(AP_HAL::UARTDriver &_uart) :
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uart(_uart)
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{}
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/*
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initialise library, starting thread
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*/
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void AP_IOMCU::init(void)
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{
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2018-04-14 08:09:11 -03:00
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// uart runs at 1.5MBit
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uart.begin(1500*1000, 256, 256);
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uart.set_blocking_writes(false);
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uart.set_unbuffered_writes(true);
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// check IO firmware CRC
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hal.scheduler->delay(2000);
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2018-05-15 23:53:23 -03:00
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AP_BoardConfig *boardconfig = AP_BoardConfig::get_instance();
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if (!boardconfig || boardconfig->io_enabled() == 1) {
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check_crc();
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}
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2018-07-06 21:39:24 -03:00
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if (!hal.scheduler->thread_create(FUNCTOR_BIND_MEMBER(&AP_IOMCU::thread_main, void), "IOMCU",
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1024, AP_HAL::Scheduler::PRIORITY_BOOST, 1)) {
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2017-12-27 03:24:15 -04:00
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AP_HAL::panic("Unable to allocate IOMCU thread");
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}
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}
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2018-01-02 02:59:20 -04:00
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/*
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handle event failure
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*/
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void AP_IOMCU::event_failed(uint8_t event)
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{
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// wait 0.5ms then retry
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hal.scheduler->delay_microseconds(500);
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trigger_event(event);
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}
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2017-12-27 03:24:15 -04:00
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/*
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main IO thread loop
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*/
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void AP_IOMCU::thread_main(void)
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2017-12-26 19:03:21 -04:00
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{
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2018-01-07 23:52:11 -04:00
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thread_ctx = chThdGetSelfX();
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2018-04-14 08:09:11 -03:00
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2017-12-27 03:24:15 -04:00
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uart.begin(1500*1000, 256, 256);
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2017-12-31 22:28:59 -04:00
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uart.set_blocking_writes(false);
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2018-01-21 16:29:15 -04:00
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uart.set_unbuffered_writes(true);
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2018-04-14 08:09:11 -03:00
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2018-01-02 02:59:20 -04:00
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trigger_event(IOEVENT_INIT);
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2017-12-27 03:24:15 -04:00
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while (true) {
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2018-06-02 12:59:33 -03:00
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eventmask_t mask = chEvtWaitAnyTimeout(~0, chTimeMS2I(10));
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2017-12-27 03:24:15 -04:00
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// check for pending IO events
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if (mask & EVENT_MASK(IOEVENT_SEND_PWM_OUT)) {
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send_servo_out();
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}
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2018-01-02 02:59:20 -04:00
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if (mask & EVENT_MASK(IOEVENT_INIT)) {
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// set IO_ARM_OK and FMU_ARMED
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if (!modify_register(PAGE_SETUP, PAGE_REG_SETUP_ARMING, 0,
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P_SETUP_ARMING_IO_ARM_OK |
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P_SETUP_ARMING_FMU_ARMED |
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P_SETUP_ARMING_RC_HANDLING_DISABLED)) {
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event_failed(IOEVENT_INIT);
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continue;
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}
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}
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2017-12-27 03:24:15 -04:00
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if (mask & EVENT_MASK(IOEVENT_FORCE_SAFETY_OFF)) {
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2018-01-02 02:59:20 -04:00
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if (!write_register(PAGE_SETUP, PAGE_REG_SETUP_FORCE_SAFETY_OFF, FORCE_SAFETY_MAGIC)) {
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event_failed(IOEVENT_FORCE_SAFETY_OFF);
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continue;
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}
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2017-12-27 03:24:15 -04:00
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}
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if (mask & EVENT_MASK(IOEVENT_FORCE_SAFETY_ON)) {
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2018-01-02 02:59:20 -04:00
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if (!write_register(PAGE_SETUP, PAGE_REG_SETUP_FORCE_SAFETY_ON, FORCE_SAFETY_MAGIC)) {
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event_failed(IOEVENT_FORCE_SAFETY_ON);
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continue;
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}
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2017-12-27 03:24:15 -04:00
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}
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2017-12-27 05:15:55 -04:00
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if (mask & EVENT_MASK(IOEVENT_SET_RATES)) {
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2018-01-02 02:59:20 -04:00
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if (!write_register(PAGE_SETUP, PAGE_REG_SETUP_ALTRATE, rate.freq) ||
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!write_register(PAGE_SETUP, PAGE_REG_SETUP_PWM_RATE_MASK, rate.chmask)) {
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event_failed(IOEVENT_SET_RATES);
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continue;
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}
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2017-12-27 05:15:55 -04:00
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}
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2017-12-31 22:28:59 -04:00
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if (mask & EVENT_MASK(IOEVENT_ENABLE_SBUS)) {
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2018-01-02 02:59:20 -04:00
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if (!write_register(PAGE_SETUP, PAGE_REG_SETUP_SBUS_RATE, rate.sbus_rate_hz) ||
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!modify_register(PAGE_SETUP, PAGE_REG_SETUP_FEATURES, 0,
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P_SETUP_FEATURES_SBUS1_OUT)) {
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event_failed(IOEVENT_ENABLE_SBUS);
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continue;
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}
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2017-12-31 22:28:59 -04:00
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}
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2018-01-03 02:25:30 -04:00
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if (mask & EVENT_MASK(IOEVENT_SET_HEATER_TARGET)) {
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if (!write_register(PAGE_SETUP, PAGE_REG_SETUP_HEATER_DUTY_CYCLE, heater_duty_cycle)) {
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event_failed(IOEVENT_SET_HEATER_TARGET);
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continue;
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}
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}
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2018-01-12 23:52:29 -04:00
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if (mask & EVENT_MASK(IOEVENT_SET_DEFAULT_RATE)) {
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if (!write_register(PAGE_SETUP, PAGE_REG_SETUP_DEFAULTRATE, rate.default_freq)) {
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event_failed(IOEVENT_SET_DEFAULT_RATE);
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continue;
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}
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}
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2018-01-16 01:37:14 -04:00
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if (mask & EVENT_MASK(IOEVENT_SET_ONESHOT_ON)) {
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if (!modify_register(PAGE_SETUP, PAGE_REG_SETUP_FEATURES, 0, P_SETUP_FEATURES_ONESHOT)) {
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event_failed(IOEVENT_SET_ONESHOT_ON);
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continue;
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}
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}
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2018-04-14 00:54:04 -03:00
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if (mask & EVENT_MASK(IOEVENT_SET_SAFETY_MASK)) {
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if (!write_register(PAGE_SETUP, PAGE_REG_SETUP_IGNORE_SAFETY, pwm_out.safety_mask)) {
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event_failed(IOEVENT_SET_SAFETY_MASK);
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continue;
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}
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}
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2017-12-27 03:24:15 -04:00
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// check for regular timed events
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uint32_t now = AP_HAL::millis();
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if (now - last_rc_read_ms > 20) {
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// read RC input at 50Hz
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read_rc_input();
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last_rc_read_ms = AP_HAL::millis();
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}
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if (now - last_status_read_ms > 50) {
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// read status at 20Hz
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read_status();
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last_status_read_ms = AP_HAL::millis();
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}
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if (now - last_servo_read_ms > 50) {
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// read servo out at 20Hz
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read_servo();
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last_servo_read_ms = AP_HAL::millis();
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}
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2018-04-13 18:00:26 -03:00
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#ifdef IOMCU_DEBUG
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2017-12-27 03:24:15 -04:00
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if (now - last_debug_ms > 1000) {
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print_debug();
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last_debug_ms = AP_HAL::millis();
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}
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2018-04-13 18:00:26 -03:00
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#endif // IOMCU_DEBUG
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2018-04-13 03:17:08 -03:00
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if (now - last_safety_option_check_ms > 1000) {
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update_safety_options();
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last_safety_option_check_ms = now;
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}
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2018-04-14 00:54:04 -03:00
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// update safety pwm
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if (pwm_out.safety_pwm_set != pwm_out.safety_pwm_sent) {
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uint8_t set = pwm_out.safety_pwm_set;
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write_registers(PAGE_DISARMED_PWM, 0, IOMCU_MAX_CHANNELS, pwm_out.safety_pwm);
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pwm_out.safety_pwm_sent = set;
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}
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2017-12-26 19:03:21 -04:00
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}
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2017-12-27 03:24:15 -04:00
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}
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2017-12-26 19:03:21 -04:00
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2017-12-27 03:24:15 -04:00
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/*
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send servo output data
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*/
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void AP_IOMCU::send_servo_out()
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{
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if (pwm_out.num_channels > 0) {
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2018-01-16 06:21:59 -04:00
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uint8_t n = pwm_out.num_channels;
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if (rate.sbus_rate_hz == 0) {
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n = MIN(n, 8);
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}
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uint32_t now = AP_HAL::micros();
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if (now - last_servo_out_us >= 2000) {
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// don't send data at more than 500Hz
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write_registers(PAGE_DIRECT_PWM, 0, n, pwm_out.pwm);
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last_servo_out_us = now;
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}
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2017-12-27 03:24:15 -04:00
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}
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2017-12-26 19:03:21 -04:00
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}
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2017-12-27 03:24:15 -04:00
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/*
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read RC input
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|
|
|
*/
|
|
|
|
void AP_IOMCU::read_rc_input()
|
|
|
|
{
|
2018-01-16 06:21:59 -04:00
|
|
|
// read a min of 9 channels and max of IOMCU_MAX_CHANNELS
|
|
|
|
uint8_t n = MIN(MAX(9, rc_input.count), IOMCU_MAX_CHANNELS);
|
2017-12-27 18:26:11 -04:00
|
|
|
read_registers(PAGE_RAW_RCIN, 0, 6+n, (uint16_t *)&rc_input);
|
2018-07-18 16:57:22 -03:00
|
|
|
if (rc_input.flags_rc_ok && !rc_input.flags_failsafe) {
|
2017-12-31 22:28:59 -04:00
|
|
|
rc_input.last_input_us = AP_HAL::micros();
|
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
2017-12-26 19:03:21 -04:00
|
|
|
|
2017-12-27 03:24:15 -04:00
|
|
|
/*
|
|
|
|
read status registers
|
|
|
|
*/
|
|
|
|
void AP_IOMCU::read_status()
|
2017-12-26 19:03:21 -04:00
|
|
|
{
|
2017-12-31 22:28:59 -04:00
|
|
|
uint16_t *r = (uint16_t *)®_status;
|
|
|
|
read_registers(PAGE_STATUS, 0, sizeof(reg_status)/2, r);
|
2018-09-03 23:16:19 -03:00
|
|
|
|
|
|
|
if (reg_status.flag_safety_off == 0) {
|
|
|
|
// if the IOMCU is indicating that safety is on, then force a
|
|
|
|
// re-check of the safety options. This copes with a IOMCU reset
|
|
|
|
last_safety_options = 0xFFFF;
|
|
|
|
|
|
|
|
// also check if the safety should be definately off.
|
|
|
|
AP_BoardConfig *boardconfig = AP_BoardConfig::get_instance();
|
|
|
|
if (!boardconfig) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
uint16_t options = boardconfig->get_safety_button_options();
|
|
|
|
if (safety_forced_off && (options & AP_BoardConfig::BOARD_SAFETY_OPTION_BUTTON_ACTIVE_SAFETY_ON) == 0) {
|
|
|
|
// the safety has been forced off, and the user has asked
|
|
|
|
// that the button can never be used, so there should be
|
|
|
|
// no way for the safety to be on except a IOMCU
|
|
|
|
// reboot. Force safety off again
|
|
|
|
force_safety_off();
|
|
|
|
}
|
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
2017-12-26 19:03:21 -04:00
|
|
|
|
2017-12-27 03:24:15 -04:00
|
|
|
/*
|
|
|
|
read servo output values
|
|
|
|
*/
|
|
|
|
void AP_IOMCU::read_servo()
|
|
|
|
{
|
|
|
|
if (pwm_out.num_channels > 0) {
|
|
|
|
read_registers(PAGE_SERVOS, 0, pwm_out.num_channels, pwm_in.pwm);
|
2017-12-26 19:03:21 -04:00
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
discard any pending input
|
|
|
|
*/
|
|
|
|
void AP_IOMCU::discard_input(void)
|
|
|
|
{
|
2018-01-22 18:04:01 -04:00
|
|
|
uint32_t n = uart.available();
|
2017-12-27 03:24:15 -04:00
|
|
|
while (n--) {
|
|
|
|
uart.read();
|
2017-12-26 19:03:21 -04:00
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
read count 16 bit registers
|
|
|
|
*/
|
|
|
|
bool AP_IOMCU::read_registers(uint8_t page, uint8_t offset, uint8_t count, uint16_t *regs)
|
|
|
|
{
|
2017-12-26 19:03:21 -04:00
|
|
|
IOPacket pkt;
|
|
|
|
|
2017-12-27 03:24:15 -04:00
|
|
|
discard_input();
|
2017-12-26 19:03:21 -04:00
|
|
|
|
2017-12-27 03:24:15 -04:00
|
|
|
memset(&pkt.regs[0], 0, count*2);
|
2017-12-26 19:03:21 -04:00
|
|
|
|
2017-12-27 03:24:15 -04:00
|
|
|
pkt.code = CODE_READ;
|
|
|
|
pkt.count = count;
|
|
|
|
pkt.page = page;
|
|
|
|
pkt.offset = offset;
|
|
|
|
pkt.crc = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
the protocol is a bit strange, as it unnecessarily sends the
|
|
|
|
same size packet that it expects to receive. This means reading
|
|
|
|
a large number of registers wastes a lot of serial bandwidth
|
|
|
|
*/
|
|
|
|
pkt.crc = crc_crc8((const uint8_t *)&pkt, pkt.get_size());
|
2018-01-22 15:18:28 -04:00
|
|
|
if (uart.write((uint8_t *)&pkt, pkt.get_size()) != pkt.get_size()) {
|
|
|
|
return false;
|
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
|
|
|
|
// wait for the expected number of reply bytes or timeout
|
|
|
|
if (!uart.wait_timeout(count*2+4, 10)) {
|
|
|
|
return false;
|
|
|
|
}
|
2017-12-26 19:03:21 -04:00
|
|
|
|
2017-12-27 03:24:15 -04:00
|
|
|
uint8_t *b = (uint8_t *)&pkt;
|
2017-12-26 19:03:21 -04:00
|
|
|
uint8_t n = uart.available();
|
2017-12-27 03:24:15 -04:00
|
|
|
for (uint8_t i=0; i<n; i++) {
|
|
|
|
if (i < sizeof(pkt)) {
|
2017-12-26 19:03:21 -04:00
|
|
|
b[i] = uart.read();
|
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t got_crc = pkt.crc;
|
|
|
|
pkt.crc = 0;
|
|
|
|
uint8_t expected_crc = crc_crc8((const uint8_t *)&pkt, pkt.get_size());
|
|
|
|
if (got_crc != expected_crc) {
|
|
|
|
hal.console->printf("bad crc %02x should be %02x n=%u %u/%u/%u\n",
|
|
|
|
got_crc, expected_crc,
|
|
|
|
n, page, offset, count);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pkt.code != CODE_SUCCESS) {
|
|
|
|
hal.console->printf("bad code %02x read %u/%u/%u\n", pkt.code, page, offset, count);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
if (pkt.count < count) {
|
|
|
|
hal.console->printf("bad count %u read %u/%u/%u n=%u\n", pkt.count, page, offset, count, n);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
memcpy(regs, pkt.regs, count*2);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
write count 16 bit registers
|
|
|
|
*/
|
|
|
|
bool AP_IOMCU::write_registers(uint8_t page, uint8_t offset, uint8_t count, const uint16_t *regs)
|
|
|
|
{
|
|
|
|
IOPacket pkt;
|
|
|
|
|
|
|
|
discard_input();
|
|
|
|
|
|
|
|
memset(&pkt.regs[0], 0, count*2);
|
|
|
|
|
|
|
|
pkt.code = CODE_WRITE;
|
|
|
|
pkt.count = count;
|
|
|
|
pkt.page = page;
|
|
|
|
pkt.offset = offset;
|
|
|
|
pkt.crc = 0;
|
|
|
|
memcpy(pkt.regs, regs, 2*count);
|
|
|
|
pkt.crc = crc_crc8((const uint8_t *)&pkt, pkt.get_size());
|
2018-01-22 15:18:28 -04:00
|
|
|
if (uart.write((uint8_t *)&pkt, pkt.get_size()) != pkt.get_size()) {
|
|
|
|
return false;
|
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
|
|
|
|
// wait for the expected number of reply bytes or timeout
|
|
|
|
if (!uart.wait_timeout(4, 10)) {
|
2018-04-14 08:09:11 -03:00
|
|
|
//hal.console->printf("no reply for %u/%u/%u\n", page, offset, count);
|
2017-12-27 03:24:15 -04:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t *b = (uint8_t *)&pkt;
|
|
|
|
uint8_t n = uart.available();
|
|
|
|
for (uint8_t i=0; i<n; i++) {
|
|
|
|
if (i < sizeof(pkt)) {
|
|
|
|
b[i] = uart.read();
|
2017-12-26 19:03:21 -04:00
|
|
|
}
|
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
|
|
|
|
if (pkt.code != CODE_SUCCESS) {
|
|
|
|
hal.console->printf("bad code %02x write %u/%u/%u %02x/%02x n=%u\n",
|
|
|
|
pkt.code, page, offset, count,
|
|
|
|
pkt.page, pkt.offset, n);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
uint8_t got_crc = pkt.crc;
|
|
|
|
pkt.crc = 0;
|
|
|
|
uint8_t expected_crc = crc_crc8((const uint8_t *)&pkt, pkt.get_size());
|
|
|
|
if (got_crc != expected_crc) {
|
|
|
|
hal.console->printf("bad crc %02x should be %02x\n", got_crc, expected_crc);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
// modify a single register
|
|
|
|
bool AP_IOMCU::modify_register(uint8_t page, uint8_t offset, uint16_t clearbits, uint16_t setbits)
|
|
|
|
{
|
|
|
|
uint16_t v = 0;
|
|
|
|
if (!read_registers(page, offset, 1, &v)) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
uint16_t v2 = (v & ~clearbits) | setbits;
|
|
|
|
if (v2 == v) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return write_registers(page, offset, 1, &v2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void AP_IOMCU::write_channel(uint8_t chan, uint16_t pwm)
|
|
|
|
{
|
2018-01-16 06:21:59 -04:00
|
|
|
if (chan >= IOMCU_MAX_CHANNELS) {
|
2017-12-27 03:24:15 -04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (chan >= pwm_out.num_channels) {
|
|
|
|
pwm_out.num_channels = chan+1;
|
|
|
|
}
|
|
|
|
pwm_out.pwm[chan] = pwm;
|
|
|
|
if (!corked) {
|
|
|
|
push();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void AP_IOMCU::print_debug(void)
|
|
|
|
{
|
2018-04-13 18:00:26 -03:00
|
|
|
#ifdef IOMCU_DEBUG
|
2017-12-27 03:24:15 -04:00
|
|
|
const uint16_t *r = (const uint16_t *)®_status;
|
|
|
|
for (uint8_t i=0; i<sizeof(reg_status)/2; i++) {
|
|
|
|
hal.console->printf("%04x ", r[i]);
|
|
|
|
}
|
|
|
|
hal.console->printf("\n");
|
2018-04-13 18:00:26 -03:00
|
|
|
#endif // IOMCU_DEBUG
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// trigger an ioevent
|
|
|
|
void AP_IOMCU::trigger_event(uint8_t event)
|
|
|
|
{
|
2018-01-12 22:33:28 -04:00
|
|
|
if (thread_ctx != nullptr) {
|
|
|
|
chEvtSignal(thread_ctx, EVENT_MASK(event));
|
|
|
|
}
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// get state of safety switch
|
|
|
|
AP_HAL::Util::safety_state AP_IOMCU::get_safety_switch_state(void) const
|
|
|
|
{
|
|
|
|
return reg_status.flag_safety_off?AP_HAL::Util::SAFETY_ARMED:AP_HAL::Util::SAFETY_DISARMED;
|
|
|
|
}
|
|
|
|
|
|
|
|
// force safety on
|
|
|
|
bool AP_IOMCU::force_safety_on(void)
|
|
|
|
{
|
|
|
|
trigger_event(IOEVENT_FORCE_SAFETY_ON);
|
2018-09-03 23:16:19 -03:00
|
|
|
safety_forced_off = false;
|
2017-12-27 03:24:15 -04:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
// force safety off
|
|
|
|
void AP_IOMCU::force_safety_off(void)
|
|
|
|
{
|
|
|
|
trigger_event(IOEVENT_FORCE_SAFETY_OFF);
|
2018-09-03 23:16:19 -03:00
|
|
|
safety_forced_off = true;
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// read from one channel
|
|
|
|
uint16_t AP_IOMCU::read_channel(uint8_t chan)
|
|
|
|
{
|
|
|
|
return pwm_in.pwm[chan];
|
|
|
|
}
|
|
|
|
|
|
|
|
// cork output
|
|
|
|
void AP_IOMCU::cork(void)
|
|
|
|
{
|
|
|
|
corked = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
// push output
|
|
|
|
void AP_IOMCU::push(void)
|
|
|
|
{
|
|
|
|
trigger_event(IOEVENT_SEND_PWM_OUT);
|
|
|
|
corked = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
// set output frequency
|
|
|
|
void AP_IOMCU::set_freq(uint16_t chmask, uint16_t freq)
|
|
|
|
{
|
2018-07-28 00:44:49 -03:00
|
|
|
const uint8_t masks[] = { 0x03,0x0C,0xF0 };
|
|
|
|
// ensure mask is legal for the timer layout
|
2018-08-02 20:27:17 -03:00
|
|
|
for (uint8_t i=0; i<ARRAY_SIZE(masks); i++) {
|
2018-07-28 00:44:49 -03:00
|
|
|
if (chmask & masks[i]) {
|
|
|
|
chmask |= masks[i];
|
|
|
|
}
|
|
|
|
}
|
2017-12-27 05:15:55 -04:00
|
|
|
rate.freq = freq;
|
2018-07-28 00:44:49 -03:00
|
|
|
rate.chmask |= chmask;
|
2017-12-27 05:15:55 -04:00
|
|
|
trigger_event(IOEVENT_SET_RATES);
|
2017-12-27 03:24:15 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// get output frequency
|
|
|
|
uint16_t AP_IOMCU::get_freq(uint16_t chan)
|
|
|
|
{
|
2017-12-27 05:15:55 -04:00
|
|
|
if ((1U<<chan) & rate.chmask) {
|
|
|
|
return rate.freq;
|
|
|
|
}
|
|
|
|
return rate.default_freq;
|
2017-12-26 19:03:21 -04:00
|
|
|
}
|
2017-12-31 22:28:59 -04:00
|
|
|
|
|
|
|
// enable SBUS out
|
|
|
|
bool AP_IOMCU::enable_sbus_out(uint16_t rate_hz)
|
|
|
|
{
|
|
|
|
rate.sbus_rate_hz = rate_hz;
|
|
|
|
trigger_event(IOEVENT_ENABLE_SBUS);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
check for new RC input
|
|
|
|
*/
|
|
|
|
bool AP_IOMCU::check_rcinput(uint32_t &last_frame_us, uint8_t &num_channels, uint16_t *channels, uint8_t max_chan)
|
|
|
|
{
|
|
|
|
if (last_frame_us != rc_input.last_input_us) {
|
2018-01-16 06:21:59 -04:00
|
|
|
num_channels = MIN(MIN(rc_input.count, IOMCU_MAX_CHANNELS), max_chan);
|
2017-12-31 22:28:59 -04:00
|
|
|
memcpy(channels, rc_input.pwm, num_channels*2);
|
|
|
|
last_frame_us = rc_input.last_input_us;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
2018-01-02 01:47:42 -04:00
|
|
|
|
2018-01-03 02:25:30 -04:00
|
|
|
// set IMU heater target
|
|
|
|
void AP_IOMCU::set_heater_duty_cycle(uint8_t duty_cycle)
|
|
|
|
{
|
|
|
|
heater_duty_cycle = duty_cycle;
|
|
|
|
trigger_event(IOEVENT_SET_HEATER_TARGET);
|
|
|
|
}
|
|
|
|
|
2018-01-12 23:52:29 -04:00
|
|
|
// set default output rate
|
|
|
|
void AP_IOMCU::set_default_rate(uint16_t rate_hz)
|
|
|
|
{
|
2018-01-22 15:18:28 -04:00
|
|
|
if (rate.default_freq != rate_hz) {
|
|
|
|
rate.default_freq = rate_hz;
|
|
|
|
trigger_event(IOEVENT_SET_DEFAULT_RATE);
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|
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}
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2018-01-12 23:52:29 -04:00
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}
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|
|
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2018-01-16 01:37:14 -04:00
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// setup for oneshot mode
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|
|
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void AP_IOMCU::set_oneshot_mode(void)
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|
|
|
{
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|
|
|
trigger_event(IOEVENT_SET_ONESHOT_ON);
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|
|
|
}
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|
|
|
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2018-04-13 03:17:08 -03:00
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// handling of BRD_SAFETYOPTION parameter
|
|
|
|
void AP_IOMCU::update_safety_options(void)
|
|
|
|
{
|
|
|
|
AP_BoardConfig *boardconfig = AP_BoardConfig::get_instance();
|
|
|
|
if (!boardconfig) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
uint16_t desired_options = 0;
|
|
|
|
uint16_t options = boardconfig->get_safety_button_options();
|
|
|
|
if (!(options & AP_BoardConfig::BOARD_SAFETY_OPTION_BUTTON_ACTIVE_SAFETY_OFF)) {
|
|
|
|
desired_options |= P_SETUP_ARMING_SAFETY_DISABLE_OFF;
|
|
|
|
}
|
|
|
|
if (!(options & AP_BoardConfig::BOARD_SAFETY_OPTION_BUTTON_ACTIVE_SAFETY_ON)) {
|
|
|
|
desired_options |= P_SETUP_ARMING_SAFETY_DISABLE_ON;
|
|
|
|
}
|
|
|
|
if (!(options & AP_BoardConfig::BOARD_SAFETY_OPTION_BUTTON_ACTIVE_ARMED) && hal.util->get_soft_armed()) {
|
|
|
|
desired_options |= (P_SETUP_ARMING_SAFETY_DISABLE_ON | P_SETUP_ARMING_SAFETY_DISABLE_OFF);
|
|
|
|
}
|
|
|
|
if (last_safety_options != desired_options) {
|
|
|
|
uint16_t mask = (P_SETUP_ARMING_SAFETY_DISABLE_ON | P_SETUP_ARMING_SAFETY_DISABLE_OFF);
|
2018-04-13 18:00:26 -03:00
|
|
|
uint32_t bits_to_set = desired_options & mask;
|
|
|
|
uint32_t bits_to_clear = (~desired_options) & mask;
|
2018-04-13 03:17:08 -03:00
|
|
|
if (modify_register(PAGE_SETUP, PAGE_REG_SETUP_ARMING, bits_to_clear, bits_to_set)) {
|
|
|
|
last_safety_options = desired_options;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-04-14 08:09:11 -03:00
|
|
|
/*
|
|
|
|
check ROMFS firmware against CRC on IOMCU, and if incorrect then upload new firmware
|
|
|
|
*/
|
|
|
|
bool AP_IOMCU::check_crc(void)
|
|
|
|
{
|
|
|
|
// flash size minus 4k bootloader
|
|
|
|
const uint32_t flash_size = 0x10000 - 0x1000;
|
|
|
|
|
2018-07-09 03:47:35 -03:00
|
|
|
fw = AP_ROMFS::find_decompress(fw_name, fw_size);
|
2018-04-14 08:09:11 -03:00
|
|
|
if (!fw) {
|
|
|
|
hal.console->printf("failed to find %s\n", fw_name);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
uint32_t crc = crc_crc32(0, fw, fw_size);
|
|
|
|
|
2018-07-10 20:51:43 -03:00
|
|
|
// pad CRC to max size
|
|
|
|
for (uint32_t i=0; i<flash_size-fw_size; i++) {
|
2018-04-14 08:09:11 -03:00
|
|
|
uint8_t b = 0xff;
|
|
|
|
crc = crc_crc32(crc, &b, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t io_crc = 0;
|
|
|
|
if (read_registers(PAGE_SETUP, PAGE_REG_SETUP_CRC, 2, (uint16_t *)&io_crc) &&
|
|
|
|
io_crc == crc) {
|
|
|
|
hal.console->printf("IOMCU: CRC ok\n");
|
2018-04-16 19:04:33 -03:00
|
|
|
crc_is_ok = true;
|
2018-07-09 03:47:35 -03:00
|
|
|
free(fw);
|
|
|
|
fw = nullptr;
|
2018-04-14 08:09:11 -03:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
const uint16_t magic = REBOOT_BL_MAGIC;
|
|
|
|
write_registers(PAGE_SETUP, PAGE_REG_SETUP_REBOOT_BL, 1, &magic);
|
|
|
|
|
2018-07-09 03:47:35 -03:00
|
|
|
if (!upload_fw()) {
|
|
|
|
free(fw);
|
|
|
|
fw = nullptr;
|
2018-05-15 23:53:23 -03:00
|
|
|
AP_BoardConfig::sensor_config_error("Failed to update IO firmware");
|
|
|
|
}
|
|
|
|
|
2018-07-09 03:47:35 -03:00
|
|
|
free(fw);
|
|
|
|
fw = nullptr;
|
2018-04-14 08:09:11 -03:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-04-14 00:54:04 -03:00
|
|
|
/*
|
|
|
|
set the pwm to use when safety is on
|
|
|
|
*/
|
|
|
|
void AP_IOMCU::set_safety_pwm(uint16_t chmask, uint16_t period_us)
|
|
|
|
{
|
|
|
|
bool changed = false;
|
|
|
|
for (uint8_t i=0; i<IOMCU_MAX_CHANNELS; i++) {
|
|
|
|
if (chmask & (1U<<i)) {
|
|
|
|
if (pwm_out.safety_pwm[i] != period_us) {
|
|
|
|
pwm_out.safety_pwm[i] = period_us;
|
|
|
|
changed = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (changed) {
|
|
|
|
pwm_out.safety_pwm_set++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// set mask of channels that ignore safety state
|
|
|
|
void AP_IOMCU::set_safety_mask(uint16_t chmask)
|
|
|
|
{
|
|
|
|
if (pwm_out.safety_mask != chmask) {
|
|
|
|
pwm_out.safety_mask = chmask;
|
|
|
|
trigger_event(IOEVENT_SET_SAFETY_MASK);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-04-16 19:04:33 -03:00
|
|
|
/*
|
|
|
|
check that IO is healthy. This should be used in arming checks
|
|
|
|
*/
|
|
|
|
bool AP_IOMCU::healthy(void)
|
|
|
|
{
|
|
|
|
// for now just check CRC
|
|
|
|
return crc_is_ok;
|
|
|
|
}
|
|
|
|
|
2018-01-02 01:47:42 -04:00
|
|
|
#endif // HAL_WITH_IO_MCU
|