2019-05-26 22:45:30 -03:00
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#!/usr/bin/env python
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'''
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these tables are generated from the STM32 datasheets for the
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STM32F103x8
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'''
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# additional build information for ChibiOS
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build = {
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"CHIBIOS_STARTUP_MK" : "os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk",
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"CHIBIOS_PLATFORM_MK" : "os/hal/ports/STM32/STM32F1xx/platform.mk",
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"CHPRINTF_USE_FLOAT" : 'no',
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"USE_FPU" : 'no'
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}
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pincount = {
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'A': 16,
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'B': 16,
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'C': 16,
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'D': 16,
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'E': 16
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}
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# MCU parameters
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mcu = {
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'RAM_MAP' : [
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(0x20000000, 20, 1), # main memory, DMA safe
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2020-05-06 23:13:29 -03:00
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],
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2022-02-21 04:28:29 -04:00
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'EXPECTED_CLOCK' : 72000000,
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'DEFINES' : {
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'STM32F1' : '1',
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}
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2019-05-26 22:45:30 -03:00
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}
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ADC1_map = {
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# format is PIN : ADC1_CHAN
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"PA0" : 0,
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"PA1" : 1,
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"PA2" : 2,
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"PA3" : 3,
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"PA4" : 4,
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"PA5" : 5,
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"PA6" : 6,
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"PA7" : 7,
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"PB0" : 8,
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"PB1" : 9,
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"PC0" : 10,
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"PC1" : 11,
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"PC2" : 12,
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"PC3" : 13,
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"PC4" : 14,
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"PC5" : 15,
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}
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DMA_Map = {
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# format is (DMA_TABLE, StreamNum, Channel)
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"ADC1" : [(1,1,0)],
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"TIM1_CH1" : [(1,2,0)],
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"TIM1_CH3" : [(1,6,0)],
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"TIM1_CH4" : [(1,4,0)],
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"TIM1_UP" : [(1,5,0)],
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"TIM2_CH1" : [(1,5,0)],
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"TIM2_CH2" : [(1,7,0)],
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"TIM2_CH3" : [(1,1,0)],
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"TIM2_CH4" : [(1,7,0)],
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"TIM2_UP" : [(1,2,0)],
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"TIM3_CH1" : [(1,6,0)],
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"TIM3_CH3" : [(1,2,0)],
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"TIM3_CH4" : [(1,3,0)],
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"TIM3_UP" : [(1,3,0)],
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"TIM4_CH1" : [(1,1,0)],
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"TIM4_CH2" : [(1,4,0)],
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"TIM4_CH3" : [(1,5,0)],
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"TIM4_UP" : [(1,7,0)],
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"TIM5_CH1" : [(2,5,0)],
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"TIM5_CH2" : [(2,4,0)],
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"TIM5_CH3" : [(2,2,0)],
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"TIM5_CH4" : [(2,1,0)],
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"TIM5_UP" : [(2,2,0)],
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"TIM8_CH1" : [(2,3,0)],
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"TIM8_CH2" : [(2,5,0)],
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"TIM8_CH3" : [(2,1,0)],
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"TIM8_CH4" : [(2,2,0)],
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"TIM8_UP" : [(2,1,0)],
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"TIM6_UP" : [(2,3,0)],
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"TIM7_UP" : [(2,4,0)],
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"I2C1_RX" : [(1,7,0)],
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"I2C1_TX" : [(1,6,0)],
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"I2C2_RX" : [(1,5,0)],
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"I2C2_TX" : [(1,4,0)],
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"SPI1_RX" : [(1,2,0)],
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"SPI1_TX" : [(1,3,0)],
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"SPI2_RX" : [(1,4,0)],
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"SPI2_TX" : [(1,5,0)],
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"SPI3_RX" : [(2,1,0)],
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"SPI3_TX" : [(2,2,0)],
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"UART4_RX" : [(2,3,0)],
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"UART4_TX" : [(2,5,0)],
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"USART1_RX" : [(1,5,0)],
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"USART1_TX" : [(1,4,0)],
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"USART2_RX" : [(1,6,0)],
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"USART2_TX" : [(1,7,0)],
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"USART3_RX" : [(1,3,0)],
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"USART3_TX" : [(1,2,0)],
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}
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