2018-02-02 16:35:18 -04:00
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/******************************************************************************
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* The MIT License
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(c) 2017 night_ghost@ykoctpa.ru
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based on:
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*
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* Copyright (c) 2010 Bryan Newbold.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*****************************************************************************/
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/**
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* @file boards.h
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(c) 2017 night_ghost@ykoctpa.ru
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based on:
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* @author Bryan Newbold <bnewbold@leaflabs.com>,
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* Marti Bolivar <mbolivar@leaflabs.com>
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* @brief Board-specific pin information.
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*
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* To add a new board type, add a new pair of files to
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* /wirish/boards/, update the section below with a new "BOARD" type,
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* and update /wirish/rules.mk to include your boards/your_board.cpp
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* file in the top-level Makefile build.
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*/
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#ifndef _BOARDS_H_
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#define _BOARDS_H_
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#include <hal.h>
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#include <stm32f4xx_conf.h>
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#include <hal_types.h>
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#include <exti.h>
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#include <gpio_hal.h>
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#include <timer.h>
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#include <adc.h>
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#include <usart.h>
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#include <pwm_in.h>
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/* Set of all possible pin names; not all boards have all these (note
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* that we use the Dx convention since all of the Maple's pins are
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* "digital" pins (e.g. can be used with digitalRead() and
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* digitalWrite()), but not all of them are connected to ADCs. */
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enum {
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D0=0, D1, D2, D3, D4, D5, D6, D7, D8, D9,
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D10, D11, D12, D13, D14, D15, D16, D17, D18, D19,
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D20, D21, D22, D23, D24, D25, D26, D27, D28, D29,
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D30, D31, D32, D33, D34, D35, D36, D37, D38, D39,
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D40, D41, D42, D43, D44, D45, D46, D47, D48, D49,
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D50, D51, D52, D53, D54, D55, D56, D57, D58, D59,
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D60, D61, D62, D63, D64, D65, D66, D67, D68, D69,
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D70, D71, D72, D73, D74, D75, D76, D77, D78, D79,
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D80, D81, D82, D83, D84, D85, D86, D87, D88, D89,
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D90, D91, D92, D93, D94, D95, D96, D97, D98, D99,
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D100, D101, D102, D103, D104, D105, D106, D107, D108, D109,
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D110, D111, };
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/**
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* @brief Stores STM32-specific information related to a given Maple pin.
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* @see PIN_MAP
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*/
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typedef struct stm32_pin_info {
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const gpio_dev * const gpio_device; /**< Maple pin's GPIO device */
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const timer_dev * const timer_device; /**< Pin's timer device, if any. */
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const adc_dev * const adc_device; /**< ADC device, if any. */
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uint8_t gpio_bit; /**< Pin's GPIO port bit. */
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timer_Channel timer_channel; /**< Timer channel, or 0 if none. */
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uint8_t adc_channel; /**< Pin ADC channel, or ADCx if none. */
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} stm32_pin_info;
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/**
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* @brief Maps each Maple pin to a corresponding stm32_pin_info.
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* @see stm32_pin_info
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*/
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extern const stm32_pin_info PIN_MAP[];
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/**
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* @brief Generic board initialization function.
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*
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* This function is called before main(). It ensures that the clocks
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* and peripherals are configured properly for use with wirish, then
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* calls boardInit().
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*
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* @see boardInit()
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*/
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void init(void);
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/**
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* @brief Board-specific initialization function.
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*
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* This function is called from init() after all generic board
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* initialization has been performed. Each board is required to
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* define its own.
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*
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* @see init()
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*/
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extern void boardInit(void);
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern void pre_init(void);
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void board_set_rtc_register(uint32_t sig, uint16_t reg);
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uint32_t board_get_rtc_register(uint16_t reg);
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static inline void goDFU();
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static inline void goDFU(){ // Reboot to BootROM - to DFU mode
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asm volatile("\
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ldr r0, =0x1FFF0000\n\
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ldr sp,[r0, #0] \n\
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ldr r0,[r0, #4] \n\
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bx r0 \n\
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");
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}
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extern unsigned __isr_vector_start; // defined by link script
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static inline bool is_bare_metal();
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static inline bool is_bare_metal() {
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return (uint32_t)&__isr_vector_start == 0x08000000;
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}
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void NMI_Handler();
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void emerg_delay(uint32_t n);
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extern void SetSysClock(uint8_t oc);
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extern voidFuncPtr boardEmergencyHandler;
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extern void clock_gettime(uint32_t mode, void *ptr);
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extern void systemInit(uint8_t oc);
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#ifdef __cplusplus
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}
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#endif
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#ifndef BOARD_NR_GPIO_PINS
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#error "Board type has not been selected correctly."
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#endif
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// pin names, see PIN_MAP array
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#define PB10 0
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#define PB2 1
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#define PB12 2
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#define PB13 3
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#define PB14 4
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#define PB15 5
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#define PC0 6
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#define PC1 7
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#define PC2 8
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#define PC3 9
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#define PC4 10
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#define PC5 11
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#define PC6 12
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#define PC7 13
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#define PC8 14
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#define PC9 15
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#define PC10 16
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#define PC11 17
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#define PC12 18
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#define PC13 19
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#define PC14 20
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#define PC15 21
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#define PA8 22
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#define PA9 23
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#define PA10 24
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#define PB9 25
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#define PD2 26
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#define PD3 27
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#define PD6 28
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#define PG11 29
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#define PG12 30
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#define PG13 31
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#define PG14 32
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#define PG8 33
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#define PG7 34
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#define PG6 35
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#define PB5 36
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#define PB6 37
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#define PB7 38
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#define PF6 39
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#define PF7 40
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#define PF8 41
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#define PF9 42
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#define PF10 43
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#define PF11 44
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#define PB1 45
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#define PB0 46
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#define PA0 47
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#define PA1 48
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#define PA2 49
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#define PA3 50
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#define PA4 51
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#define PA5 52
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#define PA6 53
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#define PA7 54
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#define PF0 55
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#define PD11 56
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#define PD14 57
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#define PF1 58
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#define PD12 59
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#define PD15 60
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#define PF2 61
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#define PD13 62
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#define PD0 63
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#define PF3 64
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#define PE3 65
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#define PD1 66
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#define PF4 67
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#define PE4 68
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#define PE7 69
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#define PF5 70
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#define PE5 71
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#define PE8 72
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#define PF12 73
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#define PE6 74
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#define PE9 75
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#define PF13 76
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#define PE10 77
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#define PF14 78
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#define PG9 79
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#define PE11 80
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#define PF15 81
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#define PG10 82
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#define PE12 83
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#define PG0 84
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#define PD5 85
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#define PE13 86
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#define PG1 87
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#define PD4 88
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#define PE14 89
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#define PG2 90
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#define PE1 91
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#define PE15 92
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#define PG3 93
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#define PE0 94
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#define PD8 95
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#define PG4 96
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#define PD9 97
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#define PG5 98
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#define PD10 99
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#define PB11 100
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#define PB8 101
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#define PE2 102
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#define PA15 103
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#define PB3 104
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#define PB4 105
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#define PA13 106
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#define PA14 107
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#define PA11 108
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/* Set derived definitions */
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#define CLOCK_SPEED_MHZ CYCLES_PER_MICROSECOND
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#define CLOCK_SPEED_HZ (CLOCK_SPEED_MHZ * 1000000UL)
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// PX4 writes as
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// *(uint32_t *)0x40002850 = 0xb007b007;
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#define BOOT_RTC_SIGNATURE 0xb007b007
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#define DFU_RTC_SIGNATURE 0xDEADBEEF
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2018-03-19 07:43:00 -03:00
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#define FORCE_APP_RTC_SIGNATURE 0x4000AbbA
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2018-02-02 16:35:18 -04:00
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#define DSM_BIND_SIGNATURE 0xD82B14D0 // "DSMBIND" last nibble for DSM code
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#define DSM_BIND_SIGN_MASK 0xF // mask for last nibble - DSM code
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#define CONSOLE_PORT_SIGNATURE 0xC07501e0 // "console" last nibble for port number
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#define CONSOLE_PORT_MASK 0xF // mask for last nibble - port number
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#define MASS_STORAGE_SIGNATURE 0x5106a8ed // "storaged"
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#define OVERCLOCK_SIGNATURE 0xFACED1A0 // "FaceDia" last nibble for mode
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#define OVERCLOCK_SIG_MASK 0xF // mode mask
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#define OV_GUARD_SIGNATURE 0xBABEFACE //
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#define OV_GUARD_FAIL_SIGNATURE 0xBABEFA17
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// Backup SRAM registers usage
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#define RTC_SIGNATURE_REG 0
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#define RTC_DSM_BIND_REG 1
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#define RTC_MASS_STORAGE_REG 2
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#define RTC_CONSOLE_REG 3
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#define RTC_OVERCLOCK_REG 4
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#define RTC_OV_GUARD_REG 5
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#define digitalPinToPort(P) ( PIN_MAP[P].gpio_device )
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#define digitalPinToBitMask(P) ( BIT(PIN_MAP[P].gpio_bit) )
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#define portOutputRegister(port) ( &(port->regs->ODR) )
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#define portInputRegister(port) ( &(port->regs->IDR) )
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#define portSetRegister(pin) ( &(PIN_MAP[pin].gpio_device->regs->BSRR) )
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#define portClearRegister(pin) ( &(PIN_MAP[pin].gpio_device->regs->BRR) )
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#define portConfigRegister(pin) ( &(PIN_MAP[pin].gpio_device->regs->CRL) )
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#endif
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