2015-09-02 11:10:46 -03:00
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#include "RCOutput_PCA9685.h"
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2016-05-17 23:26:57 -03:00
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#include <cmath>
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2014-09-18 10:29:47 -03:00
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#include <dirent.h>
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2016-05-17 23:26:57 -03:00
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#include <fcntl.h>
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2014-09-18 10:29:47 -03:00
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#include <stdint.h>
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2016-05-17 23:26:57 -03:00
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#include <stdio.h>
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#include <stdlib.h>
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#include <sys/stat.h>
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#include <sys/types.h>
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#include <unistd.h>
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#include <utility>
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#include <AP_HAL/AP_HAL.h>
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#include "GPIO.h"
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2014-09-18 10:29:47 -03:00
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2015-02-26 07:53:45 -04:00
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#define PCA9685_RA_MODE1 0x00
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#define PCA9685_RA_MODE2 0x01
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#define PCA9685_RA_LED0_ON_L 0x06
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#define PCA9685_RA_LED0_ON_H 0x07
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#define PCA9685_RA_LED0_OFF_L 0x08
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#define PCA9685_RA_LED0_OFF_H 0x09
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#define PCA9685_RA_ALL_LED_ON_L 0xFA
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#define PCA9685_RA_ALL_LED_ON_H 0xFB
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#define PCA9685_RA_ALL_LED_OFF_L 0xFC
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#define PCA9685_RA_ALL_LED_OFF_H 0xFD
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#define PCA9685_RA_PRE_SCALE 0xFE
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#define PCA9685_MODE1_RESTART_BIT (1 << 7)
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#define PCA9685_MODE1_EXTCLK_BIT (1 << 6)
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#define PCA9685_MODE1_AI_BIT (1 << 5)
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#define PCA9685_MODE1_SLEEP_BIT (1 << 4)
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#define PCA9685_MODE1_SUB1_BIT (1 << 3)
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#define PCA9685_MODE1_SUB2_BIT (1 << 2)
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#define PCA9685_MODE1_SUB3_BIT (1 << 1)
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#define PCA9685_MODE1_ALLCALL_BIT (1 << 0)
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#define PCA9685_ALL_LED_OFF_H_SHUT (1 << 4)
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#define PCA9685_MODE2_INVRT_BIT (1 << 4)
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#define PCA9685_MODE2_OCH_BIT (1 << 3)
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#define PCA9685_MODE2_OUTDRV_BIT (1 << 2)
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#define PCA9685_MODE2_OUTNE1_BIT (1 << 1)
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#define PCA9685_MODE2_OUTNE0_BIT (1 << 0)
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2015-06-12 14:46:01 -03:00
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/*
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* Drift for internal oscillator
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2016-03-25 06:47:53 -03:00
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* see: https://github.com/ArduPilot/ardupilot/commit/50459bdca0b5a1adf95
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2015-06-12 14:46:01 -03:00
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* and https://github.com/adafruit/Adafruit-PWM-Servo-Driver-Library/issues/11
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*/
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#define PCA9685_INTERNAL_CLOCK (1.04f * 25000000.f)
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#define PCA9685_EXTERNAL_CLOCK 24576000.f
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2014-09-18 10:29:47 -03:00
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using namespace Linux;
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#define PWM_CHAN_COUNT 16
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2015-10-16 17:22:11 -03:00
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static const AP_HAL::HAL& hal = AP_HAL::get_HAL();
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RCOutput_PCA9685::RCOutput_PCA9685(AP_HAL::OwnPtr<AP_HAL::I2CDevice> dev,
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bool external_clock,
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uint8_t channel_offset,
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int16_t oe_pin_number) :
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_dev(std::move(dev)),
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_enable_pin(nullptr),
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_frequency(50),
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_pulses_buffer(new uint16_t[PWM_CHAN_COUNT - channel_offset]),
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_external_clock(external_clock),
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_channel_offset(channel_offset),
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_oe_pin_number(oe_pin_number)
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{
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if (_external_clock)
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_osc_clock = PCA9685_EXTERNAL_CLOCK;
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else
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_osc_clock = PCA9685_INTERNAL_CLOCK;
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}
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2015-10-20 18:13:25 -03:00
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RCOutput_PCA9685::~RCOutput_PCA9685()
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2015-03-01 16:35:07 -04:00
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{
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delete [] _pulses_buffer;
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}
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2015-12-02 11:14:20 -04:00
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void RCOutput_PCA9685::init()
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{
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reset_all_channels();
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2014-11-26 05:37:07 -04:00
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2015-02-26 07:53:45 -04:00
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/* Set the initial frequency */
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set_freq(0, 50);
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2014-11-26 05:37:07 -04:00
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/* Enable PCA9685 PWM */
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2015-09-08 03:33:34 -03:00
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if (_oe_pin_number != -1) {
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_enable_pin = hal.gpio->channel(_oe_pin_number);
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_enable_pin->mode(HAL_GPIO_OUTPUT);
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_enable_pin->write(0);
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}
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2014-09-18 10:29:47 -03:00
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}
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2015-10-20 18:13:25 -03:00
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void RCOutput_PCA9685::reset_all_channels()
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2015-02-26 07:40:24 -04:00
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{
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if (!_dev->get_semaphore()->take(10)) {
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return;
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}
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2016-05-27 09:35:59 -03:00
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uint8_t data[] = {PCA9685_RA_ALL_LED_ON_L, 0, 0, 0, 0};
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_dev->transfer(data, sizeof(data), nullptr, 0);
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/* Wait for the last pulse to end */
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hal.scheduler->delay(2);
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2016-05-27 09:35:59 -03:00
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_dev->get_semaphore()->give();
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}
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2015-10-20 18:13:25 -03:00
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void RCOutput_PCA9685::set_freq(uint32_t chmask, uint16_t freq_hz)
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{
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/* Correctly finish last pulses */
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for (int i = 0; i < (PWM_CHAN_COUNT - _channel_offset); i++) {
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write(i, _pulses_buffer[i]);
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}
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2016-05-27 09:35:59 -03:00
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if (!_dev->get_semaphore()->take(10)) {
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return;
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}
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2015-02-26 07:40:24 -04:00
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/* Shutdown before sleeping.
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* see p.14 of PCA9685 product datasheet
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*/
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_dev->write_register(PCA9685_RA_ALL_LED_OFF_H, PCA9685_ALL_LED_OFF_H_SHUT);
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/* Put PCA9685 to sleep (required to write prescaler) */
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_dev->write_register(PCA9685_RA_MODE1, PCA9685_MODE1_SLEEP_BIT);
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2015-06-12 14:46:01 -03:00
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/* Calculate prescale and save frequency using this value: it may be
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* different from @freq_hz due to rounding/ceiling. We use ceil() rather
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* than round() so the resulting frequency is never greater than @freq_hz
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*/
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uint8_t prescale = ceil(_osc_clock / (4096 * freq_hz)) - 1;
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_frequency = _osc_clock / (4096 * (prescale + 1));
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/* Write prescale value to match frequency */
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_dev->write_register(PCA9685_RA_PRE_SCALE, prescale);
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2015-02-26 07:40:24 -04:00
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2015-06-12 14:46:01 -03:00
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if (_external_clock) {
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/* Enable external clocking */
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_dev->write_register(PCA9685_RA_MODE1,
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PCA9685_MODE1_SLEEP_BIT | PCA9685_MODE1_EXTCLK_BIT);
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}
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/* Restart the device to apply new settings and enable auto-incremented write */
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_dev->write_register(PCA9685_RA_MODE1,
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PCA9685_MODE1_RESTART_BIT | PCA9685_MODE1_AI_BIT);
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2015-02-26 07:53:45 -04:00
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2016-05-27 09:35:59 -03:00
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_dev->get_semaphore()->give();
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2014-09-18 10:29:47 -03:00
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}
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2015-10-20 18:13:25 -03:00
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uint16_t RCOutput_PCA9685::get_freq(uint8_t ch)
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{
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return _frequency;
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}
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2015-10-20 18:13:25 -03:00
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void RCOutput_PCA9685::enable_ch(uint8_t ch)
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{
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2014-09-18 10:29:47 -03:00
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}
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2015-10-20 18:13:25 -03:00
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void RCOutput_PCA9685::disable_ch(uint8_t ch)
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{
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write(ch, 0);
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}
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2015-10-20 18:13:25 -03:00
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void RCOutput_PCA9685::write(uint8_t ch, uint16_t period_us)
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{
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if (ch >= (PWM_CHAN_COUNT - _channel_offset)) {
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return;
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}
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2015-02-26 07:53:45 -04:00
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2015-09-28 19:39:17 -03:00
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_pulses_buffer[ch] = period_us;
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_pending_write_mask |= (1U << ch);
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2017-04-17 21:01:54 -03:00
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if (!_corking) {
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_corking = true;
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2015-09-28 19:39:17 -03:00
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push();
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}
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2015-09-28 19:39:17 -03:00
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}
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2015-10-20 18:13:25 -03:00
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void RCOutput_PCA9685::cork()
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2015-09-28 19:39:17 -03:00
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{
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_corking = true;
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}
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2015-10-20 18:13:25 -03:00
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void RCOutput_PCA9685::push()
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2015-09-28 19:39:17 -03:00
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{
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2017-04-17 21:01:54 -03:00
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if (!_corking) {
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return;
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}
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2015-09-28 19:39:17 -03:00
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_corking = false;
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if (_pending_write_mask == 0)
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return;
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2015-09-28 19:39:17 -03:00
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// Calculate the number of channels for this transfer.
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uint8_t max_ch = (sizeof(unsigned) * 8) - __builtin_clz(_pending_write_mask);
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uint8_t min_ch = __builtin_ctz(_pending_write_mask);
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2015-02-26 07:53:45 -04:00
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2015-09-28 19:39:17 -03:00
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/*
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* scratch buffer size is always for all the channels, but we write only
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* from min_ch to max_ch
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*/
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2016-05-27 09:35:59 -03:00
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struct PACKED pwm_values {
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uint8_t reg;
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uint8_t data[PWM_CHAN_COUNT * 4];
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} pwm_values;
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2015-02-26 07:53:45 -04:00
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2015-09-28 19:39:17 -03:00
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for (unsigned ch = min_ch; ch < max_ch; ch++) {
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uint16_t period_us = _pulses_buffer[ch];
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uint16_t length = 0;
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if (period_us) {
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length = round((period_us * 4096) / (1000000.f / _frequency)) - 1;
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}
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2016-05-27 09:35:59 -03:00
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uint8_t *d = &pwm_values.data[(ch - min_ch) * 4];
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*d++ = 0;
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*d++ = 0;
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*d++ = length & 0xFF;
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*d++ = length >> 8;
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}
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2016-05-27 09:35:59 -03:00
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if (!_dev->get_semaphore()->take_nonblocking()) {
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2015-09-28 19:39:17 -03:00
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return;
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}
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2016-05-27 09:35:59 -03:00
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pwm_values.reg = PCA9685_RA_LED0_ON_L + 4 * (_channel_offset + min_ch);
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/* reg + all the channels we are going to write */
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size_t payload_size = 1 + (max_ch - min_ch) * 4;
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2015-09-28 19:39:17 -03:00
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2016-05-27 09:35:59 -03:00
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_dev->transfer((uint8_t *)&pwm_values, payload_size, nullptr, 0);
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_dev->get_semaphore()->give();
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2015-09-28 19:39:17 -03:00
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_pending_write_mask = 0;
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2014-09-18 10:29:47 -03:00
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}
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2015-10-20 18:13:25 -03:00
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uint16_t RCOutput_PCA9685::read(uint8_t ch)
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{
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return _pulses_buffer[ch];
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}
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2015-10-20 18:13:25 -03:00
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void RCOutput_PCA9685::read(uint16_t* period_us, uint8_t len)
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2014-09-18 10:29:47 -03:00
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{
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for (int i = 0; i < len; i++) {
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period_us[i] = read(0 + i);
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}
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}
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