2018-11-16 05:11:26 -04:00
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2014 Pavel Kirienko
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Code by Siddharth Bharat Purohit
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*/
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#pragma once
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2019-01-19 01:27:52 -04:00
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#include "AP_HAL_ChibiOS.h"
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2021-03-07 23:24:38 -04:00
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# if defined(STM32H7XX) || defined(STM32G4)
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2019-07-05 02:18:54 -03:00
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#include "CANFDIface.h"
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2020-05-31 09:17:00 -03:00
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# else
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#if HAL_NUM_CAN_IFACES
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2018-11-16 05:11:26 -04:00
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#include "bxcan.hpp"
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2020-05-31 09:17:00 -03:00
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#include "EventSource.h"
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2018-11-16 05:11:26 -04:00
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2020-08-23 04:41:01 -03:00
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#ifndef HAL_CAN_RX_QUEUE_SIZE
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2020-05-31 09:17:00 -03:00
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#define HAL_CAN_RX_QUEUE_SIZE 128
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#endif
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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static_assert(HAL_CAN_RX_QUEUE_SIZE <= 254, "Invalid CAN Rx queue size");
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2018-11-16 05:11:26 -04:00
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/**
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* Single CAN iface.
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* The application shall not use this directly.
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*/
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2020-05-31 09:17:00 -03:00
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class ChibiOS::CANIface : public AP_HAL::CANIface
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{
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static constexpr unsigned long IDE = (0x40000000U); // Identifier Extension
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static constexpr unsigned long STID_MASK = (0x1FFC0000U); // Standard Identifier Mask
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static constexpr unsigned long EXID_MASK = (0x1FFFFFFFU); // Extended Identifier Mask
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static constexpr unsigned long RTR = (0x20000000U); // Remote Transmission Request
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static constexpr unsigned long DLC_MASK = (0x000F0000U); // Data Length Code
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struct CriticalSectionLocker {
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CriticalSectionLocker()
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2018-11-16 05:11:26 -04:00
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{
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2020-05-31 09:17:00 -03:00
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chSysSuspend();
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2018-11-16 05:11:26 -04:00
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}
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~CriticalSectionLocker()
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2018-11-16 05:11:26 -04:00
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{
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chSysEnable();
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2018-11-16 05:11:26 -04:00
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}
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};
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struct Timings {
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uint16_t prescaler;
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uint8_t sjw;
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uint8_t bs1;
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uint8_t bs2;
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2018-11-16 05:11:26 -04:00
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Timings()
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: prescaler(0)
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, sjw(0)
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, bs1(0)
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, bs2(0)
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{ }
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};
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enum { NumTxMailboxes = 3 };
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enum { NumFilters = 14 };
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static const uint32_t TSR_ABRQx[NumTxMailboxes];
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ChibiOS::bxcan::CanType* can_;
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2020-07-30 14:50:57 -03:00
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2020-11-28 00:21:11 -04:00
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// state for ISR RX handler. We put this in the class to avoid
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// having to expand the stack size for all threads
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AP_HAL::CANFrame isr_rx_frame;
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CanRxItem isr_rx_item;
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2020-07-30 14:50:57 -03:00
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CanRxItem rx_buffer[HAL_CAN_RX_QUEUE_SIZE];
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ByteBuffer rx_bytebuffer_;
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ObjectBuffer<CanRxItem> rx_queue_;
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CanTxItem pending_tx_[NumTxMailboxes];
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bool irq_init_:1;
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bool initialised_:1;
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bool had_activity_:1;
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2021-04-27 18:30:30 -03:00
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#if CH_CFG_USE_EVENTS == TRUE
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2020-05-31 09:17:00 -03:00
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AP_HAL::EventHandle* event_handle_;
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static ChibiOS::EventSource evt_src_;
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#endif
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const uint8_t self_index_;
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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bool computeTimings(uint32_t target_bitrate, Timings& out_timings);
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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void setupMessageRam(void);
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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bool readRxFIFO(uint8_t fifo_index);
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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void discardTimedOutTxMailboxes(uint64_t current_time);
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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bool canAcceptNewTxFrame(const AP_HAL::CANFrame& frame) const;
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2018-11-16 05:11:26 -04:00
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bool isRxBufferEmpty() const;
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2020-05-31 09:17:00 -03:00
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bool recover_from_busoff();
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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void pollErrorFlags();
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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void checkAvailable(bool& read, bool& write,
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const AP_HAL::CANFrame* pending_tx) const;
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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bool waitMsrINakBitStateChange(bool target_state);
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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void handleTxMailboxInterrupt(uint8_t mailbox_index, bool txok, const uint64_t timestamp_us);
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2018-11-16 05:11:26 -04:00
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2020-05-31 09:17:00 -03:00
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void initOnce(bool enable_irq);
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2018-11-16 05:11:26 -04:00
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2020-07-30 14:50:57 -03:00
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#if !defined(HAL_BUILD_AP_PERIPH) && !defined(HAL_BOOTLOADER_BUILD)
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2022-12-06 22:35:42 -04:00
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/*
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additional statistics
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*/
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struct bus_stats : public AP_HAL::CANIface::bus_stats_t {
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2020-05-31 09:17:00 -03:00
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uint32_t num_events;
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2021-05-20 05:45:24 -03:00
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uint32_t esr;
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2020-05-31 09:17:00 -03:00
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} stats;
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#endif
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2018-11-16 05:11:26 -04:00
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public:
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/******************************************
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* Common CAN methods *
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* ****************************************/
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CANIface(uint8_t index);
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2021-03-11 23:08:23 -04:00
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CANIface();
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static uint8_t next_interface;
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// Initialise CAN Peripheral
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bool init(const uint32_t bitrate, const OperatingMode mode) override;
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// Put frame into Tx FIFO returns negative on error, 0 on buffer full,
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// 1 on successfully pushing a frame into FIFO
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int16_t send(const AP_HAL::CANFrame& frame, uint64_t tx_deadline,
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CanIOFlags flags) override;
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// Receive frame from Rx Buffer, returns negative on error, 0 on nothing available,
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// 1 on successfully poping a frame
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int16_t receive(AP_HAL::CANFrame& out_frame, uint64_t& out_timestamp_us,
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CanIOFlags& out_flags) override;
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2020-07-30 14:50:57 -03:00
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#if !defined(HAL_BOOTLOADER_BUILD)
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2020-05-31 09:17:00 -03:00
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// Set Filters to ignore frames not to be handled by us
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bool configureFilters(const CanFilterConfig* filter_configs,
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uint16_t num_configs) override;
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#endif
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2020-05-31 09:17:00 -03:00
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// In BxCAN the Busoff error is cleared automatically,
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// so always return false
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bool is_busoff() const override
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{
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return false;
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2018-11-16 05:11:26 -04:00
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}
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2020-05-31 09:17:00 -03:00
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void clear_rx() override;
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2020-05-31 09:17:00 -03:00
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// Get number of Filter configurations
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uint16_t getNumFilters() const override
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{
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2020-05-31 09:17:00 -03:00
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return NumFilters;
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}
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2020-05-31 09:17:00 -03:00
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// Get total number of Errors discovered
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2020-07-30 14:50:57 -03:00
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#if !defined(HAL_BUILD_AP_PERIPH) && !defined(HAL_BOOTLOADER_BUILD)
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2020-05-31 09:17:00 -03:00
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uint32_t getErrorCount() const override;
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#endif
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2020-05-31 09:17:00 -03:00
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// returns true if init was successfully called
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bool is_initialized() const override
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{
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return initialised_;
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2018-11-16 05:11:26 -04:00
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}
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2020-05-31 09:17:00 -03:00
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/******************************************
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* Select Method *
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* ****************************************/
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// wait until selected event is available, false when timed out waiting else true
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bool select(bool &read, bool &write,
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const AP_HAL::CANFrame* const pending_tx,
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uint64_t blocking_deadline) override;
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2021-04-27 18:30:30 -03:00
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#if CH_CFG_USE_EVENTS == TRUE
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2020-05-31 09:17:00 -03:00
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// setup event handle for waiting on events
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bool set_event_handle(AP_HAL::EventHandle* handle) override;
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2021-04-27 18:30:30 -03:00
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#endif
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#if !defined(HAL_BUILD_AP_PERIPH) && !defined(HAL_BOOTLOADER_BUILD)
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2020-05-31 09:17:00 -03:00
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// fetch stats text and return the size of the same,
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// results available via @SYS/can0_stats.txt or @SYS/can1_stats.txt
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2020-12-30 02:44:19 -04:00
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void get_stats(ExpandingString &str) override;
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2022-12-06 22:35:42 -04:00
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/*
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return statistics structure
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*/
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const bus_stats_t *get_statistics(void) const override {
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return &stats;
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}
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2020-07-30 14:50:57 -03:00
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#endif
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2020-05-31 09:17:00 -03:00
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/************************************
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* Methods used inside interrupt *
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************************************/
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void handleTxInterrupt(uint64_t timestamp_us);
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void handleRxInterrupt(uint8_t fifo_index, uint64_t timestamp_us);
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// handle if any error occured, and do the needful such as,
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// droping the frame, and counting errors
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void pollErrorFlagsFromISR(void);
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// CAN Peripheral register structure
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2021-03-11 23:08:23 -04:00
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static constexpr bxcan::CanType* const Can[HAL_NUM_CAN_IFACES] = { HAL_CAN_BASE_LIST };
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2022-02-06 17:22:53 -04:00
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protected:
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bool add_to_rx_queue(const CanRxItem &rx_item) override {
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return rx_queue_.push(rx_item);
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}
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int8_t get_iface_num(void) const override {
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return self_index_;
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}
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2018-11-16 05:11:26 -04:00
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};
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2020-05-31 09:17:00 -03:00
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#endif //HAL_NUM_CAN_IFACES
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2021-03-07 23:24:38 -04:00
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#endif //# if defined(STM32H7XX) || defined(STM32G4)
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