2013-01-12 07:13:04 -04:00
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/// -*- tab-width: 4; Mode: C++; c-basic-offset: 4; indent-tabs-mode: nil -*-
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2015-08-11 03:28:43 -03:00
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#include <AP_HAL/AP_HAL.h>
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2012-12-12 18:01:40 -04:00
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#if (CONFIG_HAL_BOARD == HAL_BOARD_APM1 || CONFIG_HAL_BOARD == HAL_BOARD_APM2)
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2012-11-28 21:57:20 -04:00
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#include <avr/io.h>
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2015-08-11 03:28:43 -03:00
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#include <AP_HAL/AP_HAL.h>
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2012-11-28 21:57:20 -04:00
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#include "SPIDevices.h"
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#include "GPIO.h"
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2013-01-02 03:22:07 -04:00
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#include "Semaphores.h"
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2013-05-15 15:00:13 -03:00
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#include "utility/pins_arduino_mega.h"
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2012-11-28 21:57:20 -04:00
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using namespace AP_HAL_AVR;
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extern const AP_HAL::HAL& hal;
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AVRSemaphore AVRSPI2DeviceDriver::_semaphore;
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void AVRSPI2DeviceDriver::init() {
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AVRDigitalSource spi2_miso(_BV(0), PH);
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2014-06-01 20:26:19 -03:00
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spi2_miso.mode(HAL_GPIO_INPUT);
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2012-11-28 21:57:20 -04:00
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AVRDigitalSource spi2_mosi(_BV(1), PH);
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2014-06-01 20:26:19 -03:00
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spi2_mosi.mode(HAL_GPIO_OUTPUT);
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2012-11-28 21:57:20 -04:00
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AVRDigitalSource spi2_sck(_BV(2), PH);
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2014-06-01 20:26:19 -03:00
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spi2_sck.mode(HAL_GPIO_OUTPUT);
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2012-11-28 21:57:20 -04:00
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/* UMSELn1 and UMSELn2: USART in SPI Master mode */
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UCSR2C = _BV(UMSEL21) | _BV(UMSEL20);
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/* Enable RX and TX. */
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UCSR2B = _BV(RXEN2) | _BV(TXEN2);
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/* Setup chip select pin */
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_cs_pin->mode(HAL_GPIO_OUTPUT);
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2012-11-28 21:57:20 -04:00
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_cs_pin->write(1);
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}
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AP_HAL::Semaphore* AVRSPI2DeviceDriver::get_semaphore() {
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return &_semaphore;
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}
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2012-12-17 21:07:06 -04:00
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inline void AVRSPI2DeviceDriver::_cs_assert() {
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2012-11-28 21:57:20 -04:00
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/* set the device UCSRnC configuration bits.
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* only sets data order, clock phase, and clock polarity bits (lowest
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* three bits) */
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2013-10-11 05:33:47 -03:00
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const uint8_t new_ucsr2c = (UCSR2C & ~0x07) | (_ucsr2c & (0x07));
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2012-11-28 21:57:20 -04:00
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UCSR2C = new_ucsr2c;
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/* set the device baud rate */
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UBRR2 = _ubrr2;
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_cs_pin->write(0);
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}
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2012-12-17 21:07:06 -04:00
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inline void AVRSPI2DeviceDriver::_cs_release() {
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2012-11-28 21:57:20 -04:00
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_cs_pin->write(1);
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}
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2012-12-17 21:07:06 -04:00
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inline uint8_t AVRSPI2DeviceDriver::_transfer(uint8_t data) {
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2012-11-28 21:57:20 -04:00
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/* Wait for empty transmit buffer */
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while ( !( UCSR2A & _BV(UDRE2)) ) ;
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/* Put data into buffer, sends the data */
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UDR2 = data;
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/* Wait for data to be received */
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while ( !(UCSR2A & _BV(RXC2)) ) ;
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/* Get and return received data from buffer */
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return UDR2;
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}
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2013-10-10 07:13:24 -03:00
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/**
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a specialist transfer function for the APM1 ADC
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*/
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void AVRSPI2DeviceDriver::_transfer17(const uint8_t *tx, uint8_t *rx)
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{
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#define TRANSFER1(i) do { while ( !( UCSR2A & _BV(UDRE2)) ); \
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UDR2 = tx[i]; \
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while ( !(UCSR2A & _BV(RXC2)) ) ; \
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rx[i] = UDR2; } while (0)
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TRANSFER1(0);
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TRANSFER1(1);
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TRANSFER1(2);
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TRANSFER1(3);
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TRANSFER1(4);
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TRANSFER1(5);
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TRANSFER1(6);
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TRANSFER1(7);
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TRANSFER1(8);
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TRANSFER1(9);
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TRANSFER1(10);
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TRANSFER1(11);
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TRANSFER1(12);
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TRANSFER1(13);
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TRANSFER1(14);
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TRANSFER1(15);
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TRANSFER1(16);
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}
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2012-12-17 21:07:06 -04:00
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void AVRSPI2DeviceDriver::transaction(const uint8_t *tx, uint8_t *rx,
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uint16_t len) {
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_cs_assert();
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2012-12-17 21:59:46 -04:00
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if (rx == NULL) {
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for (uint16_t i = 0; i < len; i++) {
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_transfer(tx[i]);
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}
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} else {
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2013-10-10 07:13:24 -03:00
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while (len >= 17) {
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_transfer17(tx, rx);
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tx += 17;
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rx += 17;
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len -= 17;
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}
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2012-12-17 21:59:46 -04:00
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for (uint16_t i = 0; i < len; i++) {
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rx[i] = _transfer(tx[i]);
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}
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2012-12-17 21:07:06 -04:00
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}
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_cs_release();
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}
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void AVRSPI2DeviceDriver::cs_assert() {
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_cs_assert();
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}
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void AVRSPI2DeviceDriver::cs_release() {
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_cs_release();
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}
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uint8_t AVRSPI2DeviceDriver::transfer(uint8_t data) {
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return _transfer(data);
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}
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2013-01-12 07:13:04 -04:00
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void AVRSPI2DeviceDriver::transfer(const uint8_t *data, uint16_t len) {
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while (len--)
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_transfer(*data++);
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}
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2012-12-12 18:01:40 -04:00
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#endif
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