2015-10-09 16:40:42 -03:00
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/*
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* Copyright (C) 2015 Intel Corporation. All rights reserved.
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*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "RCOutput_Sysfs.h"
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#include <AP_Common/AP_Common.h>
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2016-05-17 23:26:57 -03:00
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#include <AP_HAL/AP_HAL.h>
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2015-10-09 16:40:42 -03:00
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#include <AP_Math/AP_Math.h>
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namespace Linux {
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2016-06-07 02:06:35 -03:00
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RCOutput_Sysfs::RCOutput_Sysfs(uint8_t chip, uint8_t channel_base, uint8_t channel_count)
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: _chip(chip)
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, _channel_base(channel_base)
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, _channel_count(channel_count)
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, _pwm_channels(new PWM_Sysfs_Base *[_channel_count])
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2016-10-11 17:58:40 -03:00
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, _pending(new uint16_t[_channel_count])
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2015-10-09 16:40:42 -03:00
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{
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}
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RCOutput_Sysfs::~RCOutput_Sysfs()
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{
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for (uint8_t i = 0; i < _channel_count; i++) {
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delete _pwm_channels[i];
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}
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2017-09-07 12:26:46 -03:00
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delete [] _pwm_channels;
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}
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2015-12-02 11:14:20 -04:00
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void RCOutput_Sysfs::init()
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{
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for (uint8_t i = 0; i < _channel_count; i++) {
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#if CONFIG_HAL_BOARD_SUBTYPE == HAL_BOARD_SUBTYPE_LINUX_DISCO
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_pwm_channels[i] = new PWM_Sysfs_Bebop(_channel_base+i);
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#else
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_pwm_channels[i] = new PWM_Sysfs(_chip, _channel_base+i);
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#endif
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if (!_pwm_channels[i]) {
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2015-11-19 23:10:58 -04:00
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AP_HAL::panic("RCOutput_Sysfs_PWM: Unable to setup PWM pin.");
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}
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_pwm_channels[i]->init();
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_pwm_channels[i]->enable(false);
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/* Set the initial frequency */
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_pwm_channels[i]->set_freq(50);
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_pwm_channels[i]->set_duty_cycle(0);
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_pwm_channels[i]->set_polarity(PWM_Sysfs::Polarity::NORMAL);
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}
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}
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void RCOutput_Sysfs::set_freq(uint32_t chmask, uint16_t freq_hz)
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{
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for (uint8_t i = 0; i < _channel_count; i++) {
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if (chmask & 1 << i) {
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_pwm_channels[i]->set_freq(freq_hz);
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}
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}
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}
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uint16_t RCOutput_Sysfs::get_freq(uint8_t ch)
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{
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if (ch >= _channel_count) {
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return 0;
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}
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return _pwm_channels[ch]->get_freq();
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}
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void RCOutput_Sysfs::enable_ch(uint8_t ch)
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{
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if (ch >= _channel_count) {
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return;
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}
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_pwm_channels[ch]->enable(true);
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}
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void RCOutput_Sysfs::disable_ch(uint8_t ch)
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{
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if (ch >= _channel_count) {
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return;
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}
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_pwm_channels[ch]->enable(false);
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}
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void RCOutput_Sysfs::write(uint8_t ch, uint16_t period_us)
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{
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if (ch >= _channel_count) {
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return;
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}
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if (_corked) {
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_pending[ch] = period_us;
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_pending_mask |= (1U<<ch);
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} else {
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_pwm_channels[ch]->set_duty_cycle(usec_to_nsec(period_us));
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}
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2015-10-09 16:40:42 -03:00
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}
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uint16_t RCOutput_Sysfs::read(uint8_t ch)
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{
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if (ch >= _channel_count) {
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return 1000;
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}
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return nsec_to_usec(_pwm_channels[ch]->get_duty_cycle());
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}
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void RCOutput_Sysfs::read(uint16_t *period_us, uint8_t len)
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{
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for (int i = 0; i < MIN(len, _channel_count); i++) {
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period_us[i] = read(i);
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}
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2016-06-07 02:06:35 -03:00
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for (int i = _channel_count; i < len; i++) {
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period_us[i] = 1000;
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}
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2015-10-09 16:40:42 -03:00
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}
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2016-10-11 17:58:40 -03:00
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void RCOutput_Sysfs::cork(void)
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{
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_corked = true;
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}
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void RCOutput_Sysfs::push(void)
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{
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2017-04-17 21:01:54 -03:00
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if (!_corked) {
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return;
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}
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2016-10-11 17:58:40 -03:00
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for (uint8_t i=0; i<_channel_count; i++) {
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if ((1U<<i) & _pending_mask) {
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_pwm_channels[i]->set_duty_cycle(usec_to_nsec(_pending[i]));
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}
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}
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_pending_mask = 0;
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_corked = false;
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}
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2015-10-09 16:40:42 -03:00
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}
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2016-10-11 17:58:40 -03:00
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