2018-06-02 00:25:55 -03:00
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/*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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bouncebuffer code for DMA safe memory operations
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*/
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#include "stm32_util.h"
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#include <stdint.h>
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#include <string.h>
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#include <stdio.h>
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#include "bouncebuffer.h"
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2019-02-09 17:52:15 -04:00
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#if defined(STM32H7)
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// always use a bouncebuffer on H7, to ensure alignment and padding
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#define IS_DMA_SAFE(addr) false
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2021-04-15 20:13:31 -03:00
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#elif defined(STM32F732xx)
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2021-05-08 07:54:56 -03:00
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// always use bounce buffer on F732
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2021-04-15 20:13:31 -03:00
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#define IS_DMA_SAFE(addr) false
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2019-02-17 20:10:53 -04:00
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#elif defined(STM32F7)
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// on F76x we only consider first half of DTCM memory as DMA safe, 2nd half is used as fast memory for EKF
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// on F74x we only have 64k of DTCM
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#define IS_DMA_SAFE(addr) ((((uint32_t)(addr)) & ((0xFFFFFFFF & ~(64*1024U-1)) | 1U)) == 0x20000000)
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2019-05-26 22:45:30 -03:00
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#elif defined(STM32F1)
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#define IS_DMA_SAFE(addr) true
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2018-06-02 00:25:55 -03:00
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#else
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// this checks an address is in main memory and 16 bit aligned
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#define IS_DMA_SAFE(addr) ((((uint32_t)(addr)) & 0xF0000001) == 0x20000000)
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#endif
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2021-06-01 19:27:06 -03:00
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// Enable when trying to check if you are not just listening yourself
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#define ENABLE_ECHO_SAFE 0
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2018-06-02 00:25:55 -03:00
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/*
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initialise a bouncebuffer
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*/
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2021-05-29 16:47:40 -03:00
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void bouncebuffer_init(struct bouncebuffer_t **bouncebuffer, uint32_t prealloc_bytes, bool axi_sram)
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2018-06-02 00:25:55 -03:00
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{
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(*bouncebuffer) = calloc(1, sizeof(struct bouncebuffer_t));
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osalDbgAssert(((*bouncebuffer) != NULL), "bouncebuffer init");
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2021-05-29 16:47:40 -03:00
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(*bouncebuffer)->on_axi_sram = axi_sram;
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2018-07-12 00:12:21 -03:00
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if (prealloc_bytes) {
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2021-05-29 16:47:40 -03:00
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(*bouncebuffer)->dma_buf = axi_sram?malloc_axi_sram(prealloc_bytes):malloc_dma(prealloc_bytes);
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2020-01-17 00:22:44 -04:00
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if ((*bouncebuffer)->dma_buf) {
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(*bouncebuffer)->size = prealloc_bytes;
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}
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2018-07-12 00:12:21 -03:00
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}
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2018-06-02 00:25:55 -03:00
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}
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/*
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setup for reading from a device into memory, allocating a bouncebuffer if needed
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2019-02-17 19:21:28 -04:00
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Note that *buf can be NULL, in which case we allocate DMA capable memory, but don't
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copy to it in bouncebuffer_finish_read(). This avoids DMA failures in dummyrx in the SPI LLD
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2018-06-02 00:25:55 -03:00
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*/
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2020-01-17 00:22:44 -04:00
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bool bouncebuffer_setup_read(struct bouncebuffer_t *bouncebuffer, uint8_t **buf, uint32_t size)
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2018-06-02 00:25:55 -03:00
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{
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2018-06-02 00:27:02 -03:00
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if (!bouncebuffer || IS_DMA_SAFE(*buf)) {
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2018-06-02 00:25:55 -03:00
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// nothing needs to be done
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2020-01-17 00:22:44 -04:00
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return true;
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2018-06-02 00:25:55 -03:00
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}
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osalDbgAssert((bouncebuffer->busy == false), "bouncebuffer read");
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bouncebuffer->orig_buf = *buf;
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if (bouncebuffer->size < size) {
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if (bouncebuffer->size > 0) {
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free(bouncebuffer->dma_buf);
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}
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2021-05-29 16:47:40 -03:00
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bouncebuffer->dma_buf = bouncebuffer->on_axi_sram?malloc_axi_sram(size):malloc_dma(size);
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2020-01-17 00:22:44 -04:00
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if (!bouncebuffer->dma_buf) {
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bouncebuffer->size = 0;
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return false;
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}
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2018-06-02 00:25:55 -03:00
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bouncebuffer->size = size;
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}
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*buf = bouncebuffer->dma_buf;
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2021-06-01 19:27:06 -03:00
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#if ENABLE_ECHO_SAFE
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memset(bouncebuffer->dma_buf, 0xBB, bouncebuffer->size);
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#endif
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2019-02-09 17:52:15 -04:00
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#if defined(STM32H7)
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osalDbgAssert((((uint32_t)*buf)&31) == 0, "bouncebuffer read align");
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2019-08-02 07:57:01 -03:00
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stm32_cacheBufferInvalidate(*buf, (size+31)&~31);
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2019-02-09 17:52:15 -04:00
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#endif
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2018-06-02 00:25:55 -03:00
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bouncebuffer->busy = true;
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2020-01-17 00:22:44 -04:00
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return true;
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2018-06-02 00:25:55 -03:00
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}
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/*
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finish a read operation
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*/
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void bouncebuffer_finish_read(struct bouncebuffer_t *bouncebuffer, const uint8_t *buf, uint32_t size)
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{
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2018-06-02 00:27:02 -03:00
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if (bouncebuffer && buf == bouncebuffer->dma_buf) {
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2019-02-17 19:21:28 -04:00
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osalDbgAssert((bouncebuffer->busy == true), "bouncebuffer finish_read");
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if (bouncebuffer->orig_buf) {
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memcpy(bouncebuffer->orig_buf, buf, size);
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}
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2018-06-02 00:25:55 -03:00
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bouncebuffer->busy = false;
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}
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}
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/*
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setup for reading from memory to a device, allocating a bouncebuffer if needed
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*/
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2020-01-17 00:22:44 -04:00
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bool bouncebuffer_setup_write(struct bouncebuffer_t *bouncebuffer, const uint8_t **buf, uint32_t size)
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2018-06-02 00:25:55 -03:00
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{
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2018-06-02 00:27:02 -03:00
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if (!bouncebuffer || IS_DMA_SAFE(*buf)) {
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2018-06-02 00:25:55 -03:00
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// nothing needs to be done
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2020-01-17 00:22:44 -04:00
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return true;
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2018-06-02 00:25:55 -03:00
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}
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osalDbgAssert((bouncebuffer->busy == false), "bouncebuffer write");
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if (bouncebuffer->size < size) {
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if (bouncebuffer->size > 0) {
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free(bouncebuffer->dma_buf);
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}
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2021-05-29 16:47:40 -03:00
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bouncebuffer->dma_buf = bouncebuffer->on_axi_sram?malloc_axi_sram(size):malloc_dma(size);
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2020-01-17 00:22:44 -04:00
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if (!bouncebuffer->dma_buf) {
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bouncebuffer->size = 0;
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return false;
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}
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2018-06-02 00:25:55 -03:00
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bouncebuffer->size = size;
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}
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2019-02-17 19:21:28 -04:00
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if (*buf) {
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memcpy(bouncebuffer->dma_buf, *buf, size);
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}
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2018-06-02 00:25:55 -03:00
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*buf = bouncebuffer->dma_buf;
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2019-02-09 17:52:15 -04:00
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#if defined(STM32H7)
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osalDbgAssert((((uint32_t)*buf)&31) == 0, "bouncebuffer write align");
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2019-08-02 07:57:01 -03:00
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stm32_cacheBufferFlush(*buf, (size+31)&~31);
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2019-02-09 17:52:15 -04:00
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#endif
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2018-06-02 00:25:55 -03:00
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bouncebuffer->busy = true;
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2020-01-17 00:22:44 -04:00
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return true;
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2018-06-02 00:25:55 -03:00
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}
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/*
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finish a write operation
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*/
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void bouncebuffer_finish_write(struct bouncebuffer_t *bouncebuffer, const uint8_t *buf)
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{
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2018-06-02 00:27:02 -03:00
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if (bouncebuffer && buf == bouncebuffer->dma_buf) {
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2018-06-02 00:25:55 -03:00
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osalDbgAssert((bouncebuffer->busy == true), "bouncebuffer finish_wite");
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bouncebuffer->busy = false;
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}
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}
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2020-01-17 00:22:44 -04:00
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/*
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abort an operation
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*/
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void bouncebuffer_abort(struct bouncebuffer_t *bouncebuffer)
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{
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if (bouncebuffer) {
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bouncebuffer->busy = false;
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}
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}
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