2014-06-30 10:15:36 -03:00
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/*
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* testpru
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*
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*/
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#define PRU1
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include <stdio.h>
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#include <strings.h>
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#include "linux_types.h"
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#include "pru_defs.h"
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#include "prucomm.h"
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struct pwm_cmd_l cfg;
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static void pwm_setup(void)
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{
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u8 i;
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cfg.enmask = 0;
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for (i = 0; i < MAX_PWMS; i++)
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cfg.hilo[i][0] = cfg.hilo[i][1] = PRU_us(200);
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}
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static inline u32 read_PIEP_COUNT(void)
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{
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return PIEP_COUNT;
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}
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int main(int argc, char *argv[])
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{
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u8 i;
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2014-07-01 07:46:03 -03:00
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u32 cnt, next;
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2014-06-30 10:15:36 -03:00
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u32 msk, setmsk, clrmsk;
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u32 delta, deltamin, tnext, hi, lo;
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u32 *nextp;
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const u32 *hilop;
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2014-07-11 01:06:26 -03:00
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u32 period;
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2014-06-30 10:15:36 -03:00
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u32 enmask; /* enable mask */
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u32 stmask; /* state mask */
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static u32 next_hi_lo[MAX_PWMS][3];
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static struct cxt cxt;
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/* enable OCP master port */
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PRUCFG_SYSCFG &= ~SYSCFG_STANDBY_INIT;
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PRUCFG_SYSCFG = (PRUCFG_SYSCFG &
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~(SYSCFG_IDLE_MODE_M | SYSCFG_STANDBY_MODE_M)) |
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SYSCFG_IDLE_MODE_NO | SYSCFG_STANDBY_MODE_NO;
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/* our PRU wins arbitration */
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PRUCFG_SPP |= SPP_PRU1_PAD_HP_EN;
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pwm_setup();
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/* configure timer */
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PIEP_GLOBAL_CFG = GLOBAL_CFG_DEFAULT_INC(1) |
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GLOBAL_CFG_CMP_INC(1);
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PIEP_CMP_STATUS = CMD_STATUS_CMP_HIT(1); /* clear the interrupt */
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PIEP_CMP_CMP1 = 0x0;
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PIEP_CMP_CFG |= CMP_CFG_CMP_EN(1);
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PIEP_GLOBAL_CFG |= GLOBAL_CFG_CNT_ENABLE;
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/* initialize */
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cnt = read_PIEP_COUNT();
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enmask = cfg.enmask;
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stmask = 0; /* starting all low */
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clrmsk = 0;
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for (i = 0, msk = 1, nextp = &next_hi_lo[0][0], hilop = &cfg.hilo[0][0];
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i < MAX_PWMS;
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i++, msk <<= 1, nextp += 3, hilop += 2) {
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if ((enmask & msk) == 0) {
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nextp[1] = PRU_us(100); /* default */
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nextp[2] = PRU_us(100);
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continue;
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}
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nextp[0] = cnt; /* next */
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2014-07-11 01:06:26 -03:00
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nextp[1] = 200000; /* hi */
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nextp[2] = 208000; /* lo */
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PWM_CMD->periodhi[i][0] = 408000;
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PWM_CMD->periodhi[i][1] = 180000;
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2014-06-30 10:15:36 -03:00
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}
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2014-07-11 01:06:26 -03:00
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PWM_CMD->enmask = 0;
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2014-06-30 10:15:36 -03:00
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clrmsk = enmask;
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setmsk = 0;
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/* guaranteed to be immediate */
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deltamin = 0;
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next = cnt + deltamin;
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2014-07-11 01:06:26 -03:00
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PWM_CMD->magic = PWM_REPLY_MAGIC;
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2014-06-30 10:15:36 -03:00
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while(1) {
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2014-07-11 01:06:26 -03:00
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//if(PWM_CMD->magic == PWM_CMD_MAGIC)
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{
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msk = PWM_CMD->enmask;
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for(i=0, nextp = &next_hi_lo[0][0]; i<MAX_PWMS;
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i++, nextp += 3){
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//Enable
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if ((PWM_EN_MASK & (msk&(1U<<i))) && (enmask & (msk&(1U<<i))) == 0) {
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enmask |= (msk&(1U<<i));
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__R30 |= (msk&(1U<<i));
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nextp[0] = cnt; //since we start high, wait this amount
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// first enable
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if (enmask == (msk&(1U<<i)))
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cnt = read_PIEP_COUNT();
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deltamin = 0;
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next = cnt;
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}
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//Disable
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if ((PWM_EN_MASK & (msk&(1U<<i))) && ((msk & ~(1U<<i)) == 0)) {
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enmask &= ~(1U<<i);
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__R30 &= ~(1U<<i);
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}
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//get and set pwm_vals
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if (PWM_EN_MASK & (msk&(1U<<i))) {
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//nextp = &next_hi_lo[i * 3];
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nextp[1] = PWM_CMD->periodhi[i][1];
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period = PWM_CMD->periodhi[i][0];
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nextp[2] =period - nextp[1];
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}
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PWM_CMD->hilo_read[i][0] = nextp[0];
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PWM_CMD->hilo_read[i][1] = nextp[1];
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}
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// guaranteed to be immediate
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2014-07-01 07:46:03 -03:00
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deltamin = 0;
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2014-07-11 01:06:26 -03:00
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PWM_CMD->magic = PWM_REPLY_MAGIC;
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2014-06-30 10:15:36 -03:00
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}
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2014-07-11 01:06:26 -03:00
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PWM_CMD->enmask_read = enmask;
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2014-06-30 10:15:36 -03:00
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/* if nothing is enabled just skip it all */
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if (enmask == 0)
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continue;
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setmsk = 0;
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clrmsk = (u32)-1;
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deltamin = PRU_ms(100); /* (1U << 31) - 1; */
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next = cnt + deltamin;
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#define SINGLE_PWM(_i) \
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do { \
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if (enmask & (1U << (_i))) { \
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nextp = &next_hi_lo[(_i)][0]; \
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tnext = nextp[0]; \
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hi = nextp[1]; \
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lo = nextp[2]; \
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/* avoid signed arithmetic */ \
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while (((delta = (tnext - cnt)) & (1U << 31)) != 0) { \
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/* toggle the state */ \
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if (stmask & (1U << (_i))) { \
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stmask &= ~(1U << (_i)); \
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clrmsk &= ~(1U << (_i)); \
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tnext += lo; \
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} else { \
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stmask |= (1U << (_i)); \
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setmsk |= (1U << (_i)); \
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tnext += hi; \
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} \
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} \
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if (delta <= deltamin) { \
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deltamin = delta; \
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next = tnext; \
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} \
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nextp[0] = tnext; \
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} \
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} while (0)
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#if MAX_PWMS > 0 && (PWM_EN_MASK & BIT(0))
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SINGLE_PWM(0);
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#endif
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#if MAX_PWMS > 1 && (PWM_EN_MASK & BIT(1))
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SINGLE_PWM(1);
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#endif
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#if MAX_PWMS > 2 && (PWM_EN_MASK & BIT(2))
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SINGLE_PWM(2);
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#endif
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#if MAX_PWMS > 3 && (PWM_EN_MASK & BIT(3))
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SINGLE_PWM(3);
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#endif
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#if MAX_PWMS > 4 && (PWM_EN_MASK & BIT(4))
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SINGLE_PWM(4);
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#endif
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#if MAX_PWMS > 5 && (PWM_EN_MASK & BIT(5))
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SINGLE_PWM(5);
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#endif
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#if MAX_PWMS > 6 && (PWM_EN_MASK & BIT(6))
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SINGLE_PWM(6);
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#endif
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#if MAX_PWMS > 7 && (PWM_EN_MASK & BIT(7))
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SINGLE_PWM(7);
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#endif
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#if MAX_PWMS > 8 && (PWM_EN_MASK & BIT(8))
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SINGLE_PWM(8);
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#endif
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#if MAX_PWMS > 9 && (PWM_EN_MASK & BIT(9))
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SINGLE_PWM(9);
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#endif
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#if MAX_PWMS > 10 && (PWM_EN_MASK & BIT(10))
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SINGLE_PWM(10);
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#endif
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#if MAX_PWMS > 11 && (PWM_EN_MASK & BIT(11))
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SINGLE_PWM(11);
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#endif
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#if MAX_PWMS > 12 && (PWM_EN_MASK & BIT(12))
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SINGLE_PWM(12);
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#endif
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2014-07-11 01:06:26 -03:00
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/* results in set bits where there are changes */
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2014-06-30 10:15:36 -03:00
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2014-07-11 01:06:26 -03:00
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__R30 = (__R30 & (clrmsk & 0xfff)) | (setmsk & 0xfff);
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2014-06-30 10:15:36 -03:00
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/* loop while nothing changes */
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do {
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cnt = read_PIEP_COUNT();
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if(PWM_CMD->magic == PWM_CMD_MAGIC){
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break;
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2014-07-01 07:46:03 -03:00
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}
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2014-06-30 10:15:36 -03:00
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} while (((next - cnt) & (1U << 31)) == 0);
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}
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}
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