2018-06-21 19:06:29 -03:00
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/*
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MCU tables for STM32F7
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*/
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#if defined(STM32F7)
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#define STM32_UNKNOWN 0
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#define STM32F74x_75x 0x449
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#define STM32F76x_77x 0x451
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typedef enum mcu_rev_e {
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MCU_REV_STM32F7_REV_A = 0x1000,
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MCU_REV_STM32F7_REV_Z = 0x1001,
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} mcu_rev_e;
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// The default CPU ID of STM32_UNKNOWN is 0 and is in offset 0
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// Before a rev is known it is set to ?
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// There for new silicon will result in STM32F4..,?
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mcu_des_t mcu_descriptions[] = {
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2023-04-14 07:54:34 -03:00
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{ STM32_UNKNOWN, "STM32F??????" },
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{ STM32F74x_75x, "STM32F7[4|5]x" },
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{ STM32F76x_77x, "STM32F7[6|7]x" },
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2018-06-21 19:06:29 -03:00
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};
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const mcu_rev_t silicon_revs[] = {
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{MCU_REV_STM32F7_REV_A, 'A'}, /* Revision A */
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{MCU_REV_STM32F7_REV_Z, 'Z'}, /* Revision Z */
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};
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#endif // STM32F7
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