2021-12-21 01:03:39 -04:00
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#pragma once
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2021-10-16 03:10:58 -03:00
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#include <AP_HAL/AP_HAL_Boards.h>
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#ifndef AP_SIM_JEDEC_ENABLED
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#define AP_SIM_JEDEC_ENABLED (CONFIG_HAL_BOARD == HAL_BOARD_SITL)
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#endif
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#if AP_SIM_JEDEC_ENABLED
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2021-12-21 01:03:39 -04:00
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#include "SIM_SPIDevice.h"
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namespace SITL {
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class JEDEC : public SPIDevice
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{
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public:
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int rdwr(uint8_t count, SPI::spi_ioc_transfer *&data) override;
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protected:
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virtual void fill_rdid(uint8_t *buf, uint8_t len) = 0;
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virtual void fill_rdsr(uint8_t *buf, uint8_t len) = 0;
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virtual const char *filename() const = 0;
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virtual uint8_t get_num_blocks() const = 0;
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virtual uint16_t get_page_per_block() const = 0;
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virtual uint8_t get_page_per_sector() const = 0;
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virtual uint16_t get_page_size() const = 0;
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uint32_t get_storage_size() const { return get_num_pages()*get_page_size(); } // in bytes
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uint32_t get_num_pages() const { return get_num_blocks()*get_page_per_block(); }
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private:
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enum class State {
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WAITING,
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READING_RDID,
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READING,
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WRITING,
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READING_RDSR
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} state = State::WAITING;
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bool write_enabled;
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uint32_t xfr_addr;
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void sector4k_erase(uint32_t addr);
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void block64k_erase(uint32_t addr);
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void page_erase(uint32_t addr);
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void bulk_erase();
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uint32_t parse_addr(uint8_t *buffer, uint32_t len);
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void assert_writes_enabled();
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void open_storage_fd();
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int storage_fd = -1;
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};
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}
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2021-10-16 03:10:58 -03:00
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#endif // AP_SIM_JEDEC_ENABLED
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