2013-09-22 03:01:24 -03:00
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#ifndef __AP_HAL_LINUX_RCINPUT_H__
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#define __AP_HAL_LINUX_RCINPUT_H__
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2015-08-11 03:28:43 -03:00
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#include "AP_HAL_Linux.h"
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2013-09-22 03:01:24 -03:00
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2014-08-17 23:32:22 -03:00
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#define LINUX_RC_INPUT_NUM_CHANNELS 16
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2014-08-14 13:48:17 -03:00
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2015-10-20 18:13:25 -03:00
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class Linux::RCInput : public AP_HAL::RCInput {
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2013-09-22 03:01:24 -03:00
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public:
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2015-10-20 18:13:25 -03:00
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RCInput();
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2015-09-13 15:28:02 -03:00
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2015-10-20 18:13:25 -03:00
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static RCInput *from(AP_HAL::RCInput *rcinput) {
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return static_cast<RCInput*>(rcinput);
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2015-09-13 15:28:02 -03:00
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}
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2015-12-02 11:14:20 -04:00
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virtual void init();
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2014-03-25 00:39:41 -03:00
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bool new_input();
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uint8_t num_channels();
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2013-09-22 03:01:24 -03:00
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uint16_t read(uint8_t ch);
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uint8_t read(uint16_t* periods, uint8_t len);
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bool set_overrides(int16_t *overrides, uint8_t len);
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bool set_override(uint8_t channel, int16_t override);
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void clear_overrides();
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2014-08-17 23:32:22 -03:00
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2014-08-19 00:37:10 -03:00
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// default empty _timer_tick, this is overridden by board
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// specific implementations
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virtual void _timer_tick() {}
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2015-12-13 23:19:54 -04:00
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// add some DSM input bytes, for RCInput over a serial port
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void add_dsm_input(const uint8_t *bytes, size_t nbytes);
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2014-08-19 00:37:10 -03:00
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protected:
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2016-01-18 18:04:14 -04:00
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void _process_rc_pulse(uint16_t width_s0, uint16_t width_s1);
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2015-09-04 13:37:09 -03:00
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void _update_periods(uint16_t *periods, uint8_t len);
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2014-08-17 23:32:22 -03:00
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2014-06-27 07:29:14 -03:00
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private:
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2014-08-17 23:32:22 -03:00
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volatile bool new_rc_input;
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2014-10-08 19:19:35 -03:00
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uint16_t _pwm_values[LINUX_RC_INPUT_NUM_CHANNELS];
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uint8_t _num_channels;
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2014-08-17 23:32:22 -03:00
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2014-10-06 23:24:23 -03:00
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void _process_ppmsum_pulse(uint16_t width);
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void _process_sbus_pulse(uint16_t width_s0, uint16_t width_s1);
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2014-10-07 22:49:42 -03:00
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void _process_dsm_pulse(uint16_t width_s0, uint16_t width_s1);
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2014-10-06 23:24:23 -03:00
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2014-08-19 00:37:10 -03:00
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/* override state */
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uint16_t _override[LINUX_RC_INPUT_NUM_CHANNELS];
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2014-10-06 23:24:23 -03:00
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2014-10-08 19:19:35 -03:00
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// state of ppm decoder
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struct {
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int8_t _channel_counter;
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uint16_t _pulse_capt[LINUX_RC_INPUT_NUM_CHANNELS];
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} ppm_state;
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2014-10-06 23:24:23 -03:00
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// state of SBUS bit decoder
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struct {
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uint16_t bytes[25]; // including start bit, parity and stop bits
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uint16_t bit_ofs;
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} sbus_state;
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2014-10-07 22:49:42 -03:00
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// state of DSM decoder
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struct {
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uint16_t bytes[16]; // including start bit and stop bit
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uint16_t bit_ofs;
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} dsm_state;
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2015-12-13 23:19:54 -04:00
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// state of add_dsm_input
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struct {
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uint8_t frame[16];
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uint8_t partial_frame_count;
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uint32_t last_input_ms;
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} dsm;
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2013-09-22 03:01:24 -03:00
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};
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2014-08-19 00:37:10 -03:00
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#include "RCInput_PRU.h"
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2014-11-13 19:16:59 -04:00
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#include "RCInput_ZYNQ.h"
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2014-08-19 00:37:10 -03:00
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2013-09-22 03:01:24 -03:00
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#endif // __AP_HAL_LINUX_RCINPUT_H__
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