diff --git a/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi b/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi
index c27d953..aeb025e 100644
--- a/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi
+++ b/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi
@@ -98,65 +98,65 @@ i2c8 = "/i2c@31e0000";
 				inherent_gain = "1";
 				pix_clk_hz = "74250000";
 
-        gain_factor = "3";
-        framerate_factor = "1000000";
-        exposure_factor = "1000000";
-        min_gain_val = "102";
-        max_gain_val = "250";
-        step_gain_val = "1";
-        default_gain = "102";
+				gain_factor = "3";
+				framerate_factor = "1000000";
+				exposure_factor = "1000000";
+				min_gain_val = "102";
+				max_gain_val = "250";
+				step_gain_val = "1";
+				default_gain = "102";
 				min_hdr_ratio = "1";
 				max_hdr_ratio = "1";
 
 				min_framerate = "2000000";
-        max_framerate = "60000000";
+			        max_framerate = "60000000";
 				step_framerate = "1";
-        default_framerate = "60000000"; // 60.0 fps
+			        default_framerate = "60000000"; // 60.0 fps
 
-        min_exp_time = "100"; // us
-        max_exp_time = "16620"; // us
-        step_exp_time = "1";
-        default_exp_time = "15000"; // us
+				min_exp_time = "100"; // us
+				max_exp_time = "16620"; // us
+				step_exp_time = "1";
+				default_exp_time = "15000"; // us
 			};
-      mode1 {
-        mclk_khz = "24000";
-        num_lanes = "1";
-        tegra_sinterface = "serial_b";
-        discontinuous_clk = "no";
-        dpcm_enable = "false";
-        cil_settletime = "26";
+		      mode1 {
+				mclk_khz = "24000";
+				num_lanes = "1";
+				tegra_sinterface = "serial_b";
+				discontinuous_clk = "no";
+				dpcm_enable = "false";
+				cil_settletime = "26";
 
-        active_w = "1280";
-        active_h = "960";
-        dynamic_pixel_bit_depth = "12";
-        csi_pixel_bit_depth = "12";
-        mode_type = "bayer";
-        pixel_phase = "rggb";
-        readout_orientation = "0";
-        line_length = "1650";
-        inherent_gain = "1";
-        pix_clk_hz = "74250000";
+				active_w = "1280";
+				active_h = "960";
+				dynamic_pixel_bit_depth = "12";
+				csi_pixel_bit_depth = "12";
+				mode_type = "bayer";
+				pixel_phase = "rggb";
+				readout_orientation = "0";
+				line_length = "1650";
+				inherent_gain = "1";
+				pix_clk_hz = "74250000";
 
-        gain_factor = "3";
-        framerate_factor = "1000000";
-        exposure_factor = "1000000";
-        min_gain_val = "102";
-        max_gain_val = "250";
-        step_gain_val = "1";
-        default_gain = "102";
-        min_hdr_ratio = "1";
-        max_hdr_ratio = "1";
+				gain_factor = "3";
+				framerate_factor = "1000000";
+				exposure_factor = "1000000";
+				min_gain_val = "102";
+				max_gain_val = "250";
+				step_gain_val = "1";
+				default_gain = "102";
+				min_hdr_ratio = "1";
+				max_hdr_ratio = "1";
 
-        min_framerate = "2000000";
-        max_framerate = "45000000";
-        step_framerate = "1";
-        default_framerate = "45000000"; // 45.0 fps
+				min_framerate = "2000000";
+				max_framerate = "45000000";
+				step_framerate = "1";
+				default_framerate = "45000000"; // 45.0 fps
 
-        min_exp_time = "100"; // us
-        max_exp_time = "22220"; // us
-        step_exp_time = "1";
-        default_exp_time = "15000"; // us
-      };
+				min_exp_time = "100"; // us
+				max_exp_time = "22220"; // us
+				step_exp_time = "1";
+				default_exp_time = "15000"; // us
+		      };
 
 			ports {  
 				#address-cells = <0x1>;
@@ -225,65 +225,65 @@ i2c8 = "/i2c@31e0000";
 				inherent_gain = "1";
 				pix_clk_hz = "74250000";
 
-        gain_factor = "3";
-        framerate_factor = "1000000";
-        exposure_factor = "1000000";
-        min_gain_val = "102";
-        max_gain_val = "250" ;
-        step_gain_val = "1";
-        default_gain = "102";
+				gain_factor = "3";
+				framerate_factor = "1000000";
+				exposure_factor = "1000000";
+				min_gain_val = "102";
+				max_gain_val = "250" ;
+				step_gain_val = "1";
+				default_gain = "102";
 				min_hdr_ratio = "1";
 				max_hdr_ratio = "1";
 
 				min_framerate = "2000000";
 				max_framerate = "60000000";
 				step_framerate = "1";
-        default_framerate = "60000000"; // 60.0 fps
+				default_framerate = "60000000"; // 60.0 fps
 
-        min_exp_time = "100"; // us
-        max_exp_time = "16620"; // us
-        step_exp_time = "1";
-        default_exp_time = "15000"; // us
+				min_exp_time = "100"; // us
+				max_exp_time = "16620"; // us
+				step_exp_time = "1";
+				default_exp_time = "15000"; // us
 			};
-      mode1 {
-        mclk_khz = "24000";
-        num_lanes = "1";
-        tegra_sinterface = "serial_a";
-        discontinuous_clk = "no";
-        dpcm_enable = "false";
-        cil_settletime = "26";
+		      mode1 {
+				mclk_khz = "24000";
+				num_lanes = "1";
+				tegra_sinterface = "serial_a";
+				discontinuous_clk = "no";
+				dpcm_enable = "false";
+				cil_settletime = "26";
 
-        active_w = "1280";
-        active_h = "960";
-        dynamic_pixel_bit_depth = "12";
-        csi_pixel_bit_depth = "12";
-        mode_type = "bayer";
-        pixel_phase = "rggb";
-        readout_orientation = "0";
-        line_length = "1650";
-        inherent_gain = "1";
-        pix_clk_hz = "74250000";
+				active_w = "1280";
+				active_h = "960";
+				dynamic_pixel_bit_depth = "12";
+				csi_pixel_bit_depth = "12";
+				mode_type = "bayer";
+				pixel_phase = "rggb";
+				readout_orientation = "0";
+				line_length = "1650";
+				inherent_gain = "1";
+				pix_clk_hz = "74250000";
 
-        gain_factor = "3";
-        framerate_factor = "1000000";
-        exposure_factor = "1000000";
-        min_gain_val = "102";
-        max_gain_val = "250";
-        step_gain_val = "1";
-        default_gain = "102";
-        min_hdr_ratio = "1";
-        max_hdr_ratio = "1";
+				gain_factor = "3";
+				framerate_factor = "1000000";
+				exposure_factor = "1000000";
+				min_gain_val = "102";
+				max_gain_val = "250";
+				step_gain_val = "1";
+				default_gain = "102";
+				min_hdr_ratio = "1";
+				max_hdr_ratio = "1";
 
-        min_framerate = "2000000";
-        max_framerate = "45000000";
-        step_framerate = "1";
-        default_framerate = "45000000"; // 45.0 fps
+				min_framerate = "2000000";
+				max_framerate = "45000000";
+				step_framerate = "1";
+				default_framerate = "45000000"; // 45.0 fps
 
-        min_exp_time = "100"; // us
-        max_exp_time = "22220"; // us
-        step_exp_time = "1";
-        default_exp_time = "15000"; // us
-      };
+				min_exp_time = "100"; // us
+				max_exp_time = "22220"; // us
+				step_exp_time = "1";
+				default_exp_time = "15000"; // us
+		      };
 			ports {  
 				#address-cells = <0x1>;
 				#size-cells = <0x0>;
diff --git a/kernel/nvidia-spiri/drivers/media/i2c/mt9m021.c b/kernel/nvidia-spiri/drivers/media/i2c/mt9m021.c
index e968908..1798552 100644
--- a/kernel/nvidia-spiri/drivers/media/i2c/mt9m021.c
+++ b/kernel/nvidia-spiri/drivers/media/i2c/mt9m021.c
@@ -396,64 +396,62 @@ static int mt9m021_set_gain(struct tegracam_device *tc_dev, s64 val)
 {
 	struct camera_common_data *s_data = tc_dev->s_data;
 	struct device *dev = tc_dev->dev;
-  int err = 0;
-  u16 gain_mul;
-  u16 reg16 = 0;
-  u64 gain = 0;
+	int err = 0;
+	u16 gain_mul;
+	u16 reg16 = 0;
+	u64 gain = 0;
 
 	dev_dbg(dev, "Setting Gain to: %lld", val);
 
-  if (val >= MT9M021_GAIN_8X_FIXED) {
-    gain_mul = MT9M021_GAIN_8X;
-  } else if (val >= MT9M021_GAIN_4X_FIXED) {
-    gain_mul = MT9M021_GAIN_4X;
-  } else if (val >= MT9M021_GAIN_2X_FIXED) {
-    gain_mul = MT9M021_GAIN_2X;
-  } else {
-    gain_mul = MT9M021_GAIN_1X;
-  }
+	if (val >= MT9M021_GAIN_8X_FIXED) {
+		gain_mul = MT9M021_GAIN_8X;
+	} else if (val >= MT9M021_GAIN_4X_FIXED) {
+		gain_mul = MT9M021_GAIN_4X;
+	} else if (val >= MT9M021_GAIN_2X_FIXED) {
+		gain_mul = MT9M021_GAIN_2X;
+	} else {
+		gain_mul = MT9M021_GAIN_1X;
+	}
 
-  /*
-   * Digital gain equation:
-   *
-   *  RANGE: 1x, 7.97x
-   *  STEPS: 1/32
-   *
-   *  SCALE FACTOR = 3
-   *
-   *  min_gain_val = 102
-   *  max_gain_val = 160
-   *  gain_factor = 3
-   *
-   *  gain accepts mapping to range 32 - 53
-   */
-  gain = val / 3;
+	/*
+	 * Digital gain equation:
+	 *
+	 *  RANGE: 1x, 7.97x
+	 *  STEPS: 1/32
+	 *
+	 *  SCALE FACTOR = 3
+	 *
+	 *  min_gain_val = 102
+	 *  max_gain_val = 160
+	 *  gain_factor = 3
+	 *
+	 *  gain accepts mapping to range 32 - 53
+	 */
+	gain = val / 3;
 
-  /* Update analog gain multiplier */
-  err = mt9m021_read_reg16(s_data, MT9M021_DIGITAL_TEST, &reg16);
-  if (err)
-    goto exit;
-  reg16 =
-      (reg16 & ~MT9M021_ANALOG_GAIN_MASK) |
-      ((gain_mul << MT9M021_ANALOG_GAIN_SHIFT) &
-       MT9M021_ANALOG_GAIN_MASK);
-  err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16);
-  if (err)
-    goto exit;
-
-	/* Update global gain */
-	err =
-      mt9m021_write_reg16(s_data, MT9M021_GLOBAL_GAIN, gain);
+	/* Update analog gain multiplier */
+	err = mt9m021_read_reg16(s_data, MT9M021_DIGITAL_TEST, &reg16);
 	if (err)
 		goto exit;
-	err =
-      mt9m021_write_reg16(s_data, MT9M021_GLOBAL_GAIN_CB, gain);
+	reg16 =
+	    (reg16 & ~MT9M021_ANALOG_GAIN_MASK) |
+	    ((gain_mul << MT9M021_ANALOG_GAIN_SHIFT) &
+	     MT9M021_ANALOG_GAIN_MASK);
+	err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16);
+	if (err)
+		goto exit;
+
+	/* Update global gain */
+	err = mt9m021_write_reg16(s_data, MT9M021_GLOBAL_GAIN, gain);
+	if (err)
+		goto exit;
+	err = mt9m021_write_reg16(s_data, MT9M021_GLOBAL_GAIN_CB, gain);
 	if (err)
 		goto exit;
 
 	return 0;
 
-exit:
+ exit:
 	dev_err(dev, "Gain control error: %d", err);
 
 	return err;
@@ -470,7 +468,7 @@ static int mt9m021_set_frame_length(struct mt9m021 *priv, s64 val)
 	err = mt9m021_write_reg16(s_data, MT9M021_FRAME_LENGTH_LINES, val);
 	if (err)
 		return err;
-  msleep(30);
+	msleep(30);
 
 	return 0;
 }
@@ -489,8 +487,8 @@ static int mt9m021_set_frame_rate(struct tegracam_device *tc_dev, s64 val)
 
 	/* Calculate frame-length */
 	frame_length = mode->signal_properties.pixel_clock.val *
-      mode->control_properties.framerate_factor /
-      mode->image_properties.line_length / val;
+	    mode->control_properties.framerate_factor /
+	    mode->image_properties.line_length / val;
 
 	err = mt9m021_set_frame_length(priv, frame_length);
 	if (err)
@@ -498,7 +496,7 @@ static int mt9m021_set_frame_rate(struct tegracam_device *tc_dev, s64 val)
 
 	return 0;
 
-exit:
+ exit:
 	dev_err(dev, "Frame rate control error: %d", err);
 	return err;
 }
@@ -511,7 +509,7 @@ static int mt9m021_set_coarse_time(struct mt9m021 *priv, s64 val)
 
 	dev_dbg(dev, "Setting Coarse Time to: %lld", val);
 
-  err = mt9m021_write_reg16(s_data, MT9M021_COARSE_INT_TIME, val);
+	err = mt9m021_write_reg16(s_data, MT9M021_COARSE_INT_TIME, val);
 	if (err)
 		return err;
 	err = mt9m021_write_reg16(s_data, MT9M021_COARSE_INT_TIME_CB, val);
@@ -523,28 +521,28 @@ static int mt9m021_set_coarse_time(struct mt9m021 *priv, s64 val)
 
 static int mt9m021_set_exposure(struct tegracam_device *tc_dev, s64 val)
 {
-  struct camera_common_data *s_data = tc_dev->s_data;
+	struct camera_common_data *s_data = tc_dev->s_data;
 	struct mt9m021 *priv = (struct mt9m021 *)tc_dev->priv;
 	struct device *dev = tc_dev->dev;
-  const struct sensor_mode_properties *mode =
-      &s_data->sensor_props.sensor_modes[s_data->mode];
-  u64 coarse_time;
+	const struct sensor_mode_properties *mode =
+	    &s_data->sensor_props.sensor_modes[s_data->mode];
+	u64 coarse_time;
 	int err = 0;
 
-  dev_dbg(dev, "Setting Exposure Time to : %lld", val);
+	dev_dbg(dev, "Setting Exposure Time to : %lld", val);
 
-  coarse_time =
-    val * mode->signal_properties.pixel_clock.val /
-      mode->image_properties.line_length /
-        mode->control_properties.exposure_factor;
+	coarse_time =
+	    val * mode->signal_properties.pixel_clock.val /
+	    mode->image_properties.line_length /
+	    mode->control_properties.exposure_factor;
 
-  err = mt9m021_set_coarse_time(priv, coarse_time);
+	err = mt9m021_set_coarse_time(priv, coarse_time);
 	if (err)
 		goto exit;
 
 	return err;
 
-exit:
+ exit:
 	dev_err(dev, "Exposure control error: %d", err);
 	return err;
 }
@@ -564,15 +562,14 @@ static int mt9m021_set_analog_gain(struct tegracam_device *tc_dev, s64 val)
 		goto exit;
 	reg16 =
 	    (reg16 & ~MT9M021_ANALOG_GAIN_MASK) |
-	    ((val << MT9M021_ANALOG_GAIN_SHIFT) &
-	     MT9M021_ANALOG_GAIN_MASK);
+	    ((val << MT9M021_ANALOG_GAIN_SHIFT) & MT9M021_ANALOG_GAIN_MASK);
 	err = mt9m021_write_reg16(s_data, MT9M021_DIGITAL_TEST, reg16);
 	if (err)
 		goto exit;
 
 	return 0;
 
-exit:
+ exit:
 	dev_err(dev, "Analog Gain control error: %d", err);
 
 	return err;
@@ -625,7 +622,7 @@ static int mt9m021_set_digital_gain(struct tegracam_device *tc_dev, s64 val,
 
 	return 0;
 
-exit:
+ exit:
 	dev_err(dev, "Digital Gain control error: %d", err);
 	return err;
 }
@@ -642,14 +639,13 @@ static int mt9m021_set_test_pattern(struct tegracam_device *tc_dev, s32 val)
 		err = mt9m021_write_reg16(s_data, MT9M021_TEST_PATTERN,
 					  MT9M021_TEST_PATTERN_VAL);
 	else
-		err = mt9m021_write_reg16(s_data, MT9M021_TEST_PATTERN,
-					  val);
+		err = mt9m021_write_reg16(s_data, MT9M021_TEST_PATTERN, val);
 	if (err)
 		goto exit;
 
 	return 0;
 
-exit:
+ exit:
 	dev_err(dev, "Test Pattern control error: %d", err);
 
 	return err;
@@ -664,7 +660,7 @@ static int mt9m021_set_flash(struct tegracam_device *tc_dev, s32 val)
 
 	dev_dbg(dev, "Setting Flash to: %d", val);
 
-	switch(val) {
+	switch (val) {
 	case V4L2_FLASH_LED_MODE_NONE:
 		err = mt9m021_write_reg16(s_data, MT9M021_FLASH, 0x0000);
 		priv->flash_en = false;
@@ -683,7 +679,7 @@ static int mt9m021_set_flash(struct tegracam_device *tc_dev, s32 val)
 		goto exit;
 
 	return 0;
-exit:
+ exit:
 	dev_err(dev, "Flash control error: %d", err);
 
 	return err;
@@ -697,7 +693,7 @@ static int mt9m021_set_flip(struct tegracam_device *tc_dev, s32 val, int id)
 
 	dev_dbg(dev, "Setting Flip to: %d", val);
 
-	switch(id) {
+	switch (id) {
 	case V4L2_CID_HFLIP:
 		err = mt9m021_update_bits(s_data, MT9M021_READ_MODE,
 					  val << 14, MT9M021_HFLIP_MASK);
@@ -716,7 +712,7 @@ static int mt9m021_set_flip(struct tegracam_device *tc_dev, s32 val, int id)
 		goto exit;
 
 	return 0;
-exit:
+ exit:
 	dev_err(dev, "Flip control error: %d", err);
 
 	return err;
@@ -787,7 +783,7 @@ static int mt9m021_power_off(struct camera_common_data *s_data)
 		usleep_range(2000, 2010);
 	}
 
-power_off_done:
+ power_off_done:
 	pw->state = SWITCH_OFF;
 
 	return 0;
@@ -909,7 +905,7 @@ static struct camera_common_pdata *mt9m021_parse_dt(struct tegracam_device
 
 	return board_priv_pdata;
 
-error:
+ error:
 	devm_kfree(dev, board_priv_pdata);
 
 	return ret;
@@ -999,7 +995,7 @@ static int mt9m021_set_mode(struct tegracam_device *tc_dev)
 		dev_err(dev, "%s: Failed to set pll setup\n", __func__);
 		return ret;
 	}
-  msleep(100);
+	msleep(100);
 
 	ret = mt9m021_col_correction(priv);
 	if (ret < 0) {
@@ -1084,7 +1080,7 @@ static int mt9m021_get_trigger_mode(struct mt9m021 *priv)
 	}
 
 	err =
-      of_property_read_string(node, "trigger_mode", &priv->trigger_mode);
+	    of_property_read_string(node, "trigger_mode", &priv->trigger_mode);
 	if (err == -EINVAL) {
 		dev_warn(&client->dev, "trigger_mode not in device tree\n");
 		*(&priv->trigger_mode) = "master";
@@ -1116,7 +1112,8 @@ static int mt9m021_verify_chip_id(struct mt9m021 *priv)
 		err = mt9m021_read_reg16(s_data, MT9M021_CHIP_ID_REG, &chip_id);
 		if (!err)
 			break;
-		dev_info(&client->dev, "Failed to read Chip ID, trying again\n");
+		dev_info(&client->dev,
+			 "Failed to read Chip ID, trying again\n");
 		max_retries--;
 		msleep(30);
 	}
@@ -1132,7 +1129,7 @@ static int mt9m021_verify_chip_id(struct mt9m021 *priv)
 		goto exit;
 	}
 
-exit:
+ exit:
 	ret = mt9m021_power_off(s_data);
 	if (ret)
 		return ret;
diff --git a/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h b/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h
index 88e2a97..9ecca09 100644
--- a/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h
+++ b/kernel/nvidia-spiri/drivers/media/i2c/mt9m021_mode_tbls.h
@@ -31,12 +31,12 @@
 #define mt9m021_reg struct reg_16
 
 static const mt9m021_reg mt9m021_start[] = {
-	{0x301A, 0x00DC}, /* Enable Streaming */
+	{0x301A, 0x00DC},	/* Enable Streaming */
 	{MT9M021_TABLE_END, 0x00}
 };
 
 static const mt9m021_reg mt9m021_stop[] = {
-	{0x301A, 0x00D8}, /* Disable Streaming */
+	{0x301A, 0x00D8},	/* Disable Streaming */
 	{MT9M021_TABLE_END, 0x00}
 };
 
@@ -103,41 +103,41 @@ static const mt9m021_reg mt9m021_mode_1280x720_60fps[] = {
 };
 
 static const mt9m021_reg mt9m021_mode_1280x960_45fps[] = {
-  /* Rev2 Settings */
-  {0x307A, 0x0000},
-  {0x30EA, 0x0C00},
-  {0x3044, 0x0404},
-  {0x301E, 0x012C},
-  {0x3180, 0x8000},
-  {0x3014, 0x0000},
+	/* Rev2 Settings */
+	{0x307A, 0x0000},
+	{0x30EA, 0x0C00},
+	{0x3044, 0x0404},
+	{0x301E, 0x012C},
+	{0x3180, 0x8000},
+	{0x3014, 0x0000},
 
-  /* Analog Settings */
-  {0x3ED6, 0x00FD},
-  {0x3ED8, 0x0FFF},
-  {0x3EDA, 0x0003},
-  {0x3EDC, 0xF87A},
-  {0x3EDE, 0xE075},
-  {0x3EE0, 0x077C},
-  {0x3EE2, 0xA4EB},
-  {0x3EE4, 0xD208},
+	/* Analog Settings */
+	{0x3ED6, 0x00FD},
+	{0x3ED8, 0x0FFF},
+	{0x3EDA, 0x0003},
+	{0x3EDC, 0xF87A},
+	{0x3EDE, 0xE075},
+	{0x3EE0, 0x077C},
+	{0x3EE2, 0xA4EB},
+	{0x3EE4, 0xD208},
 
-  /* Size Settings */
-  {0x3064, 0x1802},	/* EMBEDDED_DATA_CTRL */
-  {0x3032, 0x0020},	/* DIGITAL_BINNING */
-  {0x3002, 0x0004},	/* Y ADDR START */
-  {0x3004, 0x0001},	/* X ADDR START */
-  {0x3006, 0x03C3},	/* Y ADDR END */
-  {0x3008, 0x0500},	/* X ADDR END */
-  {0x300A, 0x03DE},	/* FRAME_LENGTH_LINES */
-  {0x300C, 0x0672},	/* LINE_LENGTH_PCK */
-  {0x30A2, 0x0001},	/* X_ODD_INC */
-  {0x30A6, 0x0001},	/* Y_ODD_INC */
-  {MT9M021_TABLE_END, 0x00}
+	/* Size Settings */
+	{0x3064, 0x1802},	/* EMBEDDED_DATA_CTRL */
+	{0x3032, 0x0020},	/* DIGITAL_BINNING */
+	{0x3002, 0x0004},	/* Y ADDR START */
+	{0x3004, 0x0001},	/* X ADDR START */
+	{0x3006, 0x03C3},	/* Y ADDR END */
+	{0x3008, 0x0500},	/* X ADDR END */
+	{0x300A, 0x03DE},	/* FRAME_LENGTH_LINES */
+	{0x300C, 0x0672},	/* LINE_LENGTH_PCK */
+	{0x30A2, 0x0001},	/* X_ODD_INC */
+	{0x30A6, 0x0001},	/* Y_ODD_INC */
+	{MT9M021_TABLE_END, 0x00}
 };
 
 enum {
 	MT9M021_MODE_1280x720_60FPS,
-  MT9M021_MODE_1280x960_45FPS,
+	MT9M021_MODE_1280x960_45FPS,
 
 	MT9M021_MODE_PLL_SETUP,
 
@@ -146,35 +146,37 @@ enum {
 };
 
 static const mt9m021_reg *mode_table[] = {
-	[MT9M021_MODE_1280x720_60FPS] 		= mt9m021_mode_1280x720_60fps,
-  [MT9M021_MODE_1280x960_45FPS] 		= mt9m021_mode_1280x960_45fps,
+	[MT9M021_MODE_1280x720_60FPS] = mt9m021_mode_1280x720_60fps,
+	[MT9M021_MODE_1280x960_45FPS] = mt9m021_mode_1280x960_45fps,
 
-	[MT9M021_MODE_PLL_SETUP]		= mt9m021_pll_setup,
+	[MT9M021_MODE_PLL_SETUP] = mt9m021_pll_setup,
 
-	[MT9M021_MODE_START_STREAM]		= mt9m021_start,
-	[MT9M021_MODE_STOP_STREAM]		= mt9m021_stop,
+	[MT9M021_MODE_START_STREAM] = mt9m021_start,
+	[MT9M021_MODE_STOP_STREAM] = mt9m021_stop,
 };
 
 static const int mt9m021_framerates_1280x720[] = {
 	10,
 	20,
 	30,
-       40,
+	40,
 	50,
 	60,
 };
 
 static const int mt9m021_framerates_1280x960[] = {
-  10,
-  20,
-  30,
-  40,
-  45,
+	10,
+	20,
+	30,
+	40,
+	45,
 };
 
 static const struct camera_common_frmfmt mt9m021_frmfmt[] = {
-  {{1280, 720},	mt9m021_framerates_1280x720, 1, 0, MT9M021_MODE_1280x720_60FPS},
-  {{1280, 960},	mt9m021_framerates_1280x960, 1, 0, MT9M021_MODE_1280x960_45FPS},
+	{{1280, 720}, mt9m021_framerates_1280x720, 1, 0,
+	 MT9M021_MODE_1280x720_60FPS},
+	{{1280, 960}, mt9m021_framerates_1280x960, 1, 0,
+	 MT9M021_MODE_1280x960_45FPS},
 };
 
-#endif /* __MT9M021_I2C_TABLES__ */
+#endif				/* __MT9M021_I2C_TABLES__ */