diff --git a/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera-base.dtsi b/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera-base.dtsi
new file mode 100644
index 0000000..b446782
--- /dev/null
+++ b/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera-base.dtsi
@@ -0,0 +1,384 @@
+
+/*Base include for cameras, sets up all the CSI and VI lanes etc,
+include this file in any baord specific camera files */
+
+
+#define CAM0_RST_L  TEGRA_MAIN_GPIO(R, 5)
+#define CAM0_PWDN   TEGRA_MAIN_GPIO(R, 0)
+//#define CAM1_RST_L    TEGRA_MAIN_GPIO(R, 1)
+//#define CAM1_PWDN TEGRA_MAIN_GPIO(L, 6)
+
+/ {
+    tegra-camera-platform {
+        /**
+        * tpg_max_iso = <>;
+        * Max iso bw for 6 streams of tpg
+        * streams * nvcsi_freq * PG_bitrate / RG10 * BPP
+        * 6 * 102Mhz * 32 bits/ 10 bits * 2 Bps
+        * = 3916.8 MBps
+        */
+        tpg_max_iso = <3916800>;
+    };
+
+    /* set camera gpio direction to output */
+/*  gpio@2200000 {
+        camera-control-output-low {
+            gpio-hog;
+            output-low;
+            gpios = <CAM0_RST_L 0 CAM0_PWDN 0
+                 CAM1_RST_L 0 CAM1_PWDN 0>;
+            label = "cam0-rst", "cam0-pwdn",
+                "cam1-rst", "cam1-pwdn";
+        };
+    };*/
+
+    /* all cameras are disabled by default */
+    host1x {
+        vi_base: vi@15700000 {
+            num-channels = <6>;
+            ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                vi_port0: port@0 {
+                    reg = <0>;
+                    status = "disabled";
+                    vi_in0: endpoint {
+                        status = "disabled";
+                    };
+                };
+                vi_port1: port@1 {
+                    reg = <1>;
+                    status = "disabled";
+                    vi_in1: endpoint {
+                        status = "disabled";
+                    };
+                };
+                vi_port2: port@2 {
+                    reg = <2>;
+                    status = "disabled";
+                    vi_in2: endpoint {
+                        status = "disabled";
+                    };
+                };
+                vi_port3: port@3 {
+                    reg = <3>;
+                    status = "disabled";
+                    vi_in3: endpoint {
+                        status = "disabled";
+                    };
+                };
+                vi_port4: port@4 {
+                    reg = <4>;
+                    status = "disabled";
+                    vi_in4: endpoint {
+                        status = "disabled";
+                    };
+                };
+                vi_port5: port@5 {
+                    reg = <5>;
+                    status = "disabled";
+                    vi_in5: endpoint {
+                        status = "disabled";
+                    };
+                };
+            };
+        };
+        csi_base: nvcsi@150c0000 {
+            #address-cells = <1>;
+            #size-cells = <0>;
+            num-channels = <6>;
+            status = "okay";
+            csi_chan0: channel@0 {
+                status = "disabled";
+                reg = <0>;
+                ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    csi_chan0_port0: port@0 {
+                        status = "disabled";
+                        reg = <0>;
+                        csi_in0: endpoint@0 {
+                            status = "disabled";
+
+                        };
+                    };
+                    csi_chan0_port1: port@1 {
+                        status = "disabled";
+                        reg = <1>;
+                        csi_out0: endpoint@1 {
+                            status = "disabled";
+                        };
+                    };
+                };
+            };
+            csi_chan1: channel@1 {
+                reg = <1>;
+                status = "disabled";
+                ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    csi_chan1_port0: port@0 {
+                        status = "disabled";
+                        reg = <0>;
+                        csi_in1: endpoint@2 {
+                            status = "disabled";
+                        };
+                    };
+                    csi_chan1_port1: port@1 {
+                        status = "disabled";
+                        reg = <1>;
+                        csi_out1: endpoint@3 {
+                            status = "disabled";
+                        };
+                    };
+                };
+            };
+            csi_chan2: channel@2 {
+                reg = <2>;
+                status = "disabled";
+                ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    csi_chan2_port0: port@0 {
+                        status = "disabled";
+                        reg = <0>;
+                        csi_in2: endpoint@4 {
+                            status = "disabled";
+                        };
+                    };
+                    csi_chan2_port1: port@1 {
+                        status = "disabled";
+                        reg = <1>;
+                        csi_out2: endpoint@5 {
+                            status = "disabled";
+                        };
+                    };
+                };
+            };
+            csi_chan3: channel@3 {
+                reg = <3>;
+                status = "disabled";
+                ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    csi_chan3_port0: port@0 {
+                        status = "disabled";
+                        reg = <0>;
+                        csi_in3: endpoint@6 {
+                            status = "disabled";
+                        };
+                    };
+                    csi_chan3_port1: port@1 {
+                        status = "disabled";
+                        reg = <1>;
+                        csi_out3: endpoint@7 {
+                            status = "disabled";
+                        };
+                    };
+                };
+            };
+            csi_chan4: channel@4 {
+                reg = <4>;
+                status = "disabled";
+                ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    csi_chan4_port0: port@0 {
+                        status = "disabled";
+                        reg = <0>;
+                        csi_in4: endpoint@8 {
+                            status = "disabled";
+                        };
+                    };
+                    csi_chan4_port1: port@1 {
+                        status = "disabled";
+                        reg = <1>;
+                        csi_out4: endpoint@9 {
+                            status = "disabled";
+                        };
+                    };
+                };
+            };
+            csi_chan5: channel@5 {
+                reg = <5>;
+                status = "disabled";
+                ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    csi_chan5_port0: port@0 {
+                        status = "disabled";
+                        reg = <0>;
+                        csi_in5: endpoint@10 {
+                            status = "disabled";
+                        };
+                    };
+                    csi_chan5_port1: port@1 {
+                        status = "disabled";
+                        reg = <1>;
+                        csi_out5: endpoint@11 {
+                            status = "disabled";
+                        };
+                    };
+                };
+            };
+        };
+    };
+
+    i2c@3180000 {
+        e3326_cam0: ov5693_c@36 {
+            status = "disabled";
+        };
+        e3323_cam0: ov23850_a@10 {
+            status = "disabled";
+        };
+        e3323_vcm0: lc898212@72 {
+            status = "disabled";
+        };
+        tca6408@21 {
+            status = "disabled";
+        };
+        tca9548@77 {
+            status = "disabled";
+            i2c@0 {
+                e3333_cam0: ov5693_a@36 {
+                    status = "disabled";
+                };
+                e3322_cam0: imx219_a@10 {
+                    status = "disabled";
+                };
+            };
+            i2c@1 {
+                e3333_cam1: ov5693_b@36 {
+                    status = "disabled";
+                };
+                e3322_cam1: imx219_b@10 {
+                    status = "disabled";
+                };
+            };
+            i2c@2 {
+                e3333_cam2: ov5693_c@36 {
+                    status = "disabled";
+                };
+                e3322_cam2: imx219_c@10 {
+                    status = "disabled";
+                };
+            };
+            i2c@3 {
+                e3333_cam3: ov5693_d@36 {
+                    status = "disabled";
+                };
+                e3322_cam3: imx219_d@10 {
+                    status = "disabled";
+                };
+            };
+            i2c@4 {
+                e3333_cam4: ov5693_e@36 {
+                    status = "disabled";
+                };
+                e3322_cam4: imx219_e@10 {
+                    status = "disabled";
+                };
+            };
+            i2c@5 {
+                e3333_cam5: ov5693_f@36 {
+                    status = "disabled";
+                };
+                e3322_cam5: imx219_f@10 {
+                    status = "disabled";
+                };
+            };
+        };
+        tca9546_70: tca9546@70 {
+            status = "disabled";
+            i2c@0 {
+                imx185_cam0: imx185_a@1a {
+                    status = "disabled";
+                };
+            };
+        };
+        tca9546_70: tca9546@70 {
+            status = "disabled";
+            i2c@0 {
+                imx274_cam0: imx274_a@1a {
+                    status = "disabled";
+                };
+            };
+        };
+    };
+
+    i2c@c240000 {
+        e3323_cam1: ov23850_c@36 {
+            status = "disabled";
+        };
+        e3323_vcm1: lc898212@72 {
+            status = "disabled";
+        };
+    };
+
+    tcp: tegra-camera-platform {
+        compatible = "nvidia, tegra-camera-platform";
+        modules {
+            cam_module0: module0 {
+                status = "disabled";
+                cam_module0_drivernode0: drivernode0 {
+                    status = "disabled";
+                };
+                cam_module0_drivernode1: drivernode1 {
+                    status = "disabled";
+                    pcl_id = "v4l2_lens";
+                };
+            };
+            cam_module1: module1 {
+                status = "disabled";
+                cam_module1_drivernode0: drivernode0 {
+                    status = "disabled";
+                };
+                cam_module1_drivernode1: drivernode1 {
+                    status = "disabled";
+                    pcl_id = "v4l2_lens";
+                };
+            };
+            cam_module2: module2 {
+                status = "disabled";
+                cam_module2_drivernode0: drivernode0 {
+                    status = "disabled";
+                };
+                cam_module2_drivernode1: drivernode1 {
+                    status = "disabled";
+                    pcl_id = "v4l2_lens";
+                };
+            };
+            cam_module3: module3 {
+                status = "disabled";
+                cam_module3_drivernode0: drivernode0 {
+                    status = "disabled";
+                };
+                cam_module3_drivernode1: drivernode1 {
+                    status = "disabled";
+                    pcl_id = "v4l2_lens";
+                };
+            };
+            cam_module4: module4 {
+                status = "disabled";
+                cam_module4_drivernode0: drivernode0 {
+                    status = "disabled";
+                };
+                cam_module4_drivernode1: drivernode1 {
+                    status = "disabled";
+                    pcl_id = "v4l2_lens";
+                };
+            };
+            cam_module5: module5 {
+                status = "disabled";
+                cam_module5_drivernode0: drivernode0 {
+                    status = "disabled";
+                };
+                cam_module5_drivernode1: drivernode1 {
+                    status = "disabled";
+                    pcl_id = "v4l2_lens";
+                };
+            };
+        };
+    };
+};
+
diff --git a/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi b/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi
new file mode 100644
index 0000000..abb0f36
--- /dev/null
+++ b/hardware/nvidia-spiri/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi
@@ -0,0 +1,347 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <t18x-common-platforms/tegra186-tx2-spiri-camera-base.dtsi>
+#include "dt-bindings/clock/tegra186-clock.h"
+#define CAM0_RST        TEGRA_MAIN_GPIO(R, 5)
+#define CAM1_RST        TEGRA_MAIN_GPIO(R, 1)
+#define CAM0_PWDN       TEGRA_MAIN_GPIO(R, 0)
+#define CAM1_PWDN       TEGRA_MAIN_GPIO(N, 2)
+
+
+/*
+I2C Busses:
+
+i2c0 = "/i2c@3160000";
+i2c1 = "/i2c@c240000";
+i2c2 = "/i2c@3180000";
+i2c3 = "/i2c@3190000";
+i2c4 = "/i2c@31a0000";
+i2c5 = "/i2c@31b0000";
+i2c6 = "/i2c@31c0000";
+i2c7 = "/i2c@c250000";
+i2c8 = "/i2c@31e0000";
+*/
+
+/ {
+    gpio@2200000 {
+        camera-control-output-low {
+            gpio-hog;
+            output-low;
+            gpios = <CAM0_RST 0 CAM0_PWDN 0 CAM1_RST 0 CAM1_PWDN 0>;
+            label = "cam0-rst", "cam0-pwdn, cam1-rst, cam1-pwdn";
+            status = "okay";
+        };
+    };
+	i2c@c240000 {
+		status = "okay";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		mt9m021_b@10 {
+			compatible = "nvidia,mt9m021";
+
+			/* I2C device address */
+			reg = <0x10>;
+
+			/* Physical dimensions of sensor */
+			physical_w = "10";
+			physical_h = "10";
+
+			/* Sensor Model */
+			sensor_model ="mt9m021";
+
+			/* slave or master mode */
+			trigger_mode = "slave";
+
+			/* input clock for the device in MHz*/
+			clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH2>,
+				 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
+			clock-names = "extperiph2", "pllp_grtba";
+			clock-frequency = <24000000>;
+			mclk = "extperiph2";
+
+			/* gpios */
+			reset-gpios = <&tegra_main_gpio CAM1_RST GPIO_ACTIVE_HIGH>;
+
+			mode0 {
+				mclk_khz = "24000";
+				num_lanes = "1";
+				tegra_sinterface = "serial_b";
+				discontinuous_clk = "no";
+				dpcm_enable = "false";
+				cil_settletime = "26";
+
+				active_w = "1280";
+				active_h = "720";
+				dynamic_pixel_bit_depth = "12";
+				csi_pixel_bit_depth = "12";
+				mode_type = "bayer";
+				pixel_phase = "rggb";
+				readout_orientation = "0";
+				line_length = "1650";
+				inherent_gain = "1";
+				pix_clk_hz = "74250000";
+
+				gain_factor = "1";
+				framerate_factor = "1000000";
+				exposure_factor = "1000000";
+				min_gain_val = "4";
+				max_gain_val = "6476";
+				step_gain_val = "1";
+				default_gain = "100";
+				min_hdr_ratio = "1";
+				max_hdr_ratio = "1";
+
+				min_framerate = "2000000";
+				max_framerate = "60000000";
+				step_framerate = "1";
+				default_framerate = "6000000"; /* 60.0 fps */
+
+				min_exp_time = "23"; /* us */
+				max_exp_time = "14933"; /* us */
+				step_exp_time = "1";
+				default_exp_time = "10000"; /* us */
+			};
+			ports {
+				#address-cells = <0x1>;
+				#size-cells = <0x0>;
+
+				port@0 {
+					reg = <0x0>;
+					mt9m021_slave: endpoint {
+						port-index = <0x1>;
+						bus-width = <0x1>;
+						remote-endpoint = <&mt9m021_slave_nvcsi_port0>;
+					};
+				};
+			};
+		};
+	};
+
+	i2c@3180000 {
+		status = "okay";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		mt9m021_a@10 {
+			compatible = "nvidia,mt9m021";
+
+			/* I2C device address */
+			reg = <0x10>;
+
+			/* Physical dimensions of sensor */
+			physical_w = "10";
+			physical_h = "10";
+
+			/* Sensor Model */
+			sensor_model ="mt9m021";
+
+			/* slave or master mode */
+			trigger_mode = "master";
+
+			/* input clock for the device in MHz*/
+			clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
+				 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
+			clock-names = "extperiph1", "pllp_grtba";
+			clock-frequency = <24000000>;
+			mclk = "extperiph1";
+
+			/* gpios */
+			reset-gpios = <&tegra_main_gpio CAM0_RST GPIO_ACTIVE_HIGH>;
+
+			mode0 {
+				mclk_khz = "24000";
+				num_lanes = "1";
+				tegra_sinterface = "serial_a";
+				discontinuous_clk = "no";
+				dpcm_enable = "false";
+				cil_settletime = "26";
+
+				active_w = "1280";
+				active_h = "720";
+				dynamic_pixel_bit_depth = "12";
+				csi_pixel_bit_depth = "12";
+				mode_type = "bayer";
+				pixel_phase = "rggb";
+				readout_orientation = "0";
+				line_length = "1650";
+				inherent_gain = "1";
+				pix_clk_hz = "74250000";
+
+				gain_factor = "1";
+				framerate_factor = "1000000";
+				exposure_factor = "1000000";
+				min_gain_val = "4";
+				max_gain_val = "6476";
+				step_gain_val = "1";
+				default_gain = "100";
+				min_hdr_ratio = "1";
+				max_hdr_ratio = "1";
+
+				min_framerate = "2000000";
+				max_framerate = "60000000";
+				step_framerate = "1";
+				default_framerate = "6000000"; /* 60.0 fps */
+
+				min_exp_time = "23"; /* us */
+				max_exp_time = "14933"; /* us */
+				step_exp_time = "1";
+				default_exp_time = "10000"; /* us */
+			};
+			ports {
+				#address-cells = <0x1>;
+				#size-cells = <0x0>;
+
+				port@0 {
+					reg = <0x0>;
+					mt9m021_master: endpoint {
+						port-index = <0x0>;
+						bus-width = <0x1>;
+						remote-endpoint = <&mt9m021_master_nvcsi_port0>;
+					};
+				};
+			};
+		};
+	};
+
+	host1x {
+		vi@15700000 {
+			num-channels = <0x2>;
+			ports {
+				#address-cells = <0x1>;
+				#size-cells = <0x0>;
+				port@0 {
+					reg = <0x0>;
+					status = "okay";
+					mt9m021_master_vi: endpoint {
+						status = "okay";
+						port-index = <0x0>;
+						bus-width = <0x1>;
+						remote-endpoint = <&mt9m021_master_nvcsi_port1>;
+					};
+				};
+				port@1 {
+					reg = <0x1>;
+					status = "okay";
+					mt9m021_slave_vi: endpoint {
+						status = "okay";
+						port-index = <0x1>;
+						bus-width = <0x1>;
+						remote-endpoint = <&mt9m021_slave_nvcsi_port1>;
+					};
+				};
+			};
+		};
+
+		nvcsi@150c0000 {
+			status = "okay";
+			num-channels = <0x2>;
+			#address-cells = <0x1>;
+			#size-cells = <0x0>;
+			channel@0 {
+				status = "okay";
+				reg = <0x0>;
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					port@0 {
+						status = "okay";
+						reg = <0x0>;
+						mt9m021_master_nvcsi_port0: endpoint@0 {
+							status = "okay";
+							port-index = <0x0>;
+							bus-width = <0x1>;
+							remote-endpoint = <&mt9m021_master>;
+						};
+					};
+					port@1 {
+						status = "okay";
+						reg = <0x1>;
+						mt9m021_master_nvcsi_port1: endpoint@1 {
+							status = "okay";
+							remote-endpoint = <&mt9m021_master_vi>;
+						};
+					};
+				};
+			};
+			channel@1 {
+				status = "okay";
+				reg = <0x1>;
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					port@0 {
+						status = "okay";
+						reg = <0x0>;
+						mt9m021_slave_nvcsi_port0: endpoint@2 {
+							status = "okay";
+							port-index = <0x1>;
+							bus-width = <0x1>;
+							remote-endpoint = <&mt9m021_slave>;
+						};
+					};
+					port@1 {
+						status = "okay";
+						reg = <0x1>;
+						mt9m021_slave_nvcsi_port1: endpoint@3 {
+							status = "okay";
+							remote-endpoint = <&mt9m021_slave_vi>;
+						};
+					};
+				};
+			};
+		};
+	};
+
+	tegra-camera-platform {
+		compatible = "nvidia, tegra-camera-platform";
+		status = "okay";
+		num_csi_lanes = <1>;
+		max_lane_speed = <1500000>;
+		min_bits_per_pixel = <12>;
+		vi_peak_byte_per_pixel = <2>;
+		vi_bw_margin_pct = <25>;
+		max_pixel_rate = <160000>;
+		isp_peak_byte_per_pixel = <5>;
+		isp_bw_margin_pct = <25>;
+		modules {
+			module0 {
+				status = "okay";
+				badge = "mt9m021_slave";
+				position = "rear";
+				orientation = "1";
+				drivernode0 {
+					status = "okay";
+					pcl_id = "v4l2_sensor";
+					devname = "mt9m021 1-0010";
+					proc-device-tree = "/proc/device-tree/i2c@c240000/mt9m021_b@10";
+				};
+			};
+			module1 {
+				status = "okay";
+				badge = "mt9m021_master";
+				position = "front";
+				orientation = "1";
+				drivernode0 {
+					status = "okay";
+					pcl_id = "v4l2_sensor";
+					devname = "mt9m021 2-0010";
+					proc-device-tree = "/proc/device-tree/i2c@3180000/mt9m021_a@10";
+				};
+			};
+		};
+	};
+};
diff --git a/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/Makefile b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/Makefile
new file mode 100644
index 0000000..dc97155
--- /dev/null
+++ b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/Makefile
@@ -0,0 +1,22 @@
+old-dtb := $(dtb-y)
+old-dtbo := $(dtbo-y)
+dtb-y :=
+dtbo-y :=
+makefile-path := platform/t18x/quill/kernel-dts
+
+dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-tx2-spiri-mPCIe.dtb
+dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-tx2-spiri-revF+.dtb
+dtb-$(CONFIG_ARCH_TEGRA_18x_SOC) += tegra186-tx2-spiri-USB3.dtb
+
+ifneq ($(dtb-y),)
+dtb-y := $(addprefix $(makefile-path)/,$(dtb-y))
+dtbo-y := $(addprefix $(makefile-path)/,$(dtbo-y))
+dts-include += $(makefile-path)
+ifneq ($(dtbo-y),)
+dtbo-y := $(addprefix $(makefile-path)/,$(dtbo-y))
+endif
+endif
+
+#dtb-y += $(old-dtb)
+#dtbo-y += $(old-dtbo)
+
diff --git a/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-USB3.dts b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-USB3.dts
new file mode 100644
index 0000000..714543f
--- /dev/null
+++ b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-USB3.dts
@@ -0,0 +1,133 @@
+#include <tegra186-tx2-spiri-base.dts>
+#include <t18x-common-platforms/tegra186-tx2-spiri-camera-base.dtsi>
+/{
+    nvidia,dtsfilename = "tegra186-tx2-spiri-USB3.dts";
+
+    gpio@2200000 {
+    /*enable this to enabled PCIe Controller #2*/
+        pcie0_lane2_mux {
+             status = "disable";
+        };
+    /******************************************/
+    /*enable these two to enable USB3 Port 0*/
+        e3325_sdio_rst {
+           status = "okay";
+        };
+        e3325_lane0_mux {
+            status = "okay";
+        };
+    /******************************************/
+
+    };
+
+
+
+    xhci@3530000 {
+        status = "okay";
+        phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
+            <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
+            <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>,
+            <&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-0}>;
+        phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0";
+    };
+
+
+   xusb_padctl@3520000 {
+        pads {
+            usb2 {
+                lanes {
+                    usb2-0 {
+                        status = "okay";
+                    };
+                    usb2-1 {
+                        status = "okay";
+                    };
+                    usb2-2 {
+                        status = "okay";
+                    };
+                };
+            };
+            usb3 {
+                lanes {
+                    usb3-0 {
+                        status = "okay";
+                    };
+                    usb3-1 {
+                        status = "disabled";
+                    };
+                    usb3-2 {
+                        status = "disabled";
+                    };
+                };
+            };
+        };
+        ports {
+            usb2-0 {
+                status = "okay";
+            };
+            usb2-1 {
+                status = "okay";
+            };
+
+            usb2-2 {
+                status = "okay";
+            };
+
+            usb3-0 {
+                nvidia,usb2-companion = <1>;
+                status = "okay";
+            };
+            usb3-1 {
+                nvidia,usb2-companion = <0>;
+                status = "disabled";
+            };
+            usb3-2 {
+                nvidia,usb2-companion = <2>;
+                status = "disabled";
+            };
+        };
+    };
+    pinctrl@3520000 {
+        status = "okay";
+           pinmux {
+            usb2-port0 {
+                status = "okay";
+            };
+            usb2-port1 {
+                status = "okay";
+            };
+
+            usb2-port2 {
+                status = "okay";
+            };
+
+            usb3-port0 {
+                status = "okay";
+            };
+
+            usb3-port1 {
+                status = "disabled";
+            };
+
+            usb3-port2 {
+                status = "disabled";
+            };
+        };
+    };
+    pcie-controller@10003000 {
+        pci@1,0 {
+            nvidia,num-lanes = <1>;
+            status = "okay";
+        };
+        pci@2,0 {
+            nvidia,num-lanes = <0>;
+            status = "disabled";
+        };
+        pci@3,0 {
+            nvidia,num-lanes = <1>;
+            status = "okay";
+        };
+    };
+
+
+};
diff --git a/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-base.dts b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-base.dts
new file mode 100644
index 0000000..3a09797
--- /dev/null
+++ b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-base.dts
@@ -0,0 +1,267 @@
+
+#include <t18x-common-platforms/tegra186-quill-common-p3310-1000-a00.dtsi>
+//#include <t18x-common-platforms/tegra186-quill-power-tree-p3310-1000-a00-00.dtsi>
+#include <t18x-common-platforms/tegra186-tx2-cti-power-tree.dtsi>
+//#include <t18x-common-platforms/tegra186-quill-camera-modules.dtsi>
+#include <t18x-common-modules/tegra186-display-e3320-1000-a00.dtsi>
+
+
+/* comms dtsi file should be included after gpio dtsi file */
+#include <t18x-common-platforms/tegra186-quill-comms.dtsi>
+#include <t18x-common-plugin-manager/tegra186-tx2-cti-plugin-manager.dtsi>
+#include <t18x-common-modules/tegra186-super-module-e2614-p2597-1000-a00.dtsi>
+#include <t18x-common-plugin-manager/tegra186-quill-display-plugin-manager.dtsi>
+#include <t18x-common-prod/tegra186-priv-quill-p3310-1000-a00-prod.dtsi>
+//#include <t18x-common-plugin-manager/tegra186-quill-camera-plugin-manager.dtsi>
+#include "tegra186-tx2-cti-usb-pcie-base.dtsi"
+
+/ {
+    model = "quill";
+    compatible = "nvidia,quill", "nvidia,tegra186";
+
+    nvidia,boardids = "3310:0000:C03";
+    nvidia,proc-boardid = "3310:0000:C03";
+
+	nvidia,dtsfilename = __FILE__;
+	nvidia,dtbbuildtime = __DATE__, __TIME__;
+	nvidia,fastboot-usb-vid = <0x0955>;
+	nvidia,fastboot-usb-pid = <0xee16>;
+
+    chosen {
+        board-has-eeprom;
+	stdout-path = &uarta;
+        bootargs ="root=/dev/mmcblk0p1 rw rootwait console=ttyS0,115200n8 console=tty0 OS=l4t fbcon=map:0 net.ifnames=0 memtype=0 video=tegrafb no_console_suspend=1 earlycon=uart8250,mmio32,0x03100000 nvdumper_reserved=0x2772e0000 gpt tegraid=18.1.2.0.0 tegra_keep_boot_clocks maxcpus=6 androidboot.serialno=0320817068659 bl_prof_dataptr=0x10000@0x277240000 sdhci_tegra.en_boot_part_access=1 root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4";
+	plugin-manager {
+		odm-data {
+			l4t;
+		};
+	};
+	bootloader {
+      		nvidia,skip-display-init;
+    	};        
+    };
+
+    firmware {
+        android {
+            compatible = "android,firmware";
+            hardware = "quill";
+            vbmeta {
+                compatible = "android,vbmeta";
+                parts = "vbmeta,kernel,kernel-dtb,kernel-dtbo,APP,vendor,SOS";
+            };
+            fstab {
+                compatible = "android,fstab";
+                vendor {
+                    compatible = "android,vendor";
+                    dev = "/dev/block/platform/3460000.sdhci/by-name/vendor";
+                    type = "ext4";
+                    mnt_flags = "ro";
+                    fsmgr_flags = "wait,avb";
+                };
+                odm {
+                    compatible = "android,odm";
+                    dev = "/dev/block/platform/3460000.sdhci/by-name/odm";
+                    type = "ext4";
+                    mnt_flags = "ro";
+                    fsmgr_flags = "wait,avb";
+                };
+            };
+        };
+    };
+
+    memory@80000000 {
+        device_type = "memory";
+        reg = <0x0 0x80000000 0x0 0x70000000>;
+    };
+
+    i2c@3160000 {
+
+	/*
+        gpio@74{
+            status = "disabled";
+        };
+	*/
+	/*
+        gpio@77{
+            status = "disabled";
+
+        };
+	*/
+
+        lp8557-backlight-s-wuxga-8-0@2c {
+            status = "disabled";
+        };
+    };
+
+    i2c@c240000 {
+        clock-frequency = <400000>;
+    };
+
+    cpus {
+        status = "disabled";
+    };
+    host1x {
+        sor {
+            status = "disabled";
+            dp-display {
+                status = "disabled";
+            };
+            hdmi-display {
+                status = "disabled";
+            };
+
+            panel-s-edp-uhdtv-15-6 {
+                smartdimmer {
+                    status = "disabled";
+                };
+            };
+        };
+
+        dpaux@155c0000 {
+            status = "disabled";
+        };
+
+        sor1 {
+            status = "okay";
+            nvidia,active-panel = <&sor1_hdmi_display>;
+            hdmi-display {
+                status = "okay";
+            };
+            dp-display {
+                status = "disabled";
+            };
+        };
+
+        nvdisplay@15200000 {
+            status = "disabled";
+        };
+
+        nvdisplay@15220000 {
+            status = "disabled";
+        };
+    };
+
+
+	pinmux@2430000 {
+		common {
+			gpio_edp2_pp5 {
+				status = "okay";
+			};
+
+			gpio_edp3_pp6 {
+				status = "okay";
+			};
+		};
+	};
+
+	gpio@2200000 {
+		sdmmc-wake-support-input {
+			status = "okay";
+		};
+
+		sdmmc-wake-support-output {
+			status = "okay";
+		};
+	};
+
+
+	sdhci@3400000 {
+		cd-gpios = <&tegra_main_gpio TEGRA_MAIN_GPIO(P, 5) 0>;
+		nvidia,cd-wakeup-capable;
+	};
+
+/*	i2c@3160000 {
+        /delete-node/ ina3221x@40;
+		/delete-node/ ina3221x@41;
+
+	};*/
+
+	i2c@c240000 {
+		bmi160@69 {
+			compatible = "bmi,bmi160";
+			reg = <0x69>;
+			interrupt-parent = <&tegra_aon_gpio>;
+			interrupts = <TEGRA_AON_GPIO(AA, 2) 0x01>;
+			accelerometer_matrix    = [01 00 00 00 01 00 00 00 01];
+			gyroscope_matrix        = [01 00 00 00 01 00 00 00 01];
+			accelerometer_delay_us_min = <1250>;
+			gyroscope_delay_us_min = <1250>;
+			vdd-supply = <&spmic_sd3>;
+			vdd_IO-supply = <&spmic_sd3>;
+			status = "disabled";
+		};
+	};
+
+	mttcan@c310000 {
+		status = "disabled";
+		gpio_can_stb = <&tegra_aon_gpio TEGRA_AON_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
+		gpio_can_en = <&tegra_aon_gpio TEGRA_AON_GPIO(AA, 1) GPIO_ACTIVE_HIGH>;
+	};
+
+	mttcan@c320000 {
+		status = "disabled";
+		gpio_can_stb = <&tegra_aon_gpio TEGRA_AON_GPIO(AA, 6) GPIO_ACTIVE_HIGH>;
+		gpio_can_en = <&tegra_aon_gpio TEGRA_AON_GPIO(AA, 7) GPIO_ACTIVE_HIGH>;
+	};
+
+	ahci-sata@3507000 {
+		gpios = <&spmic 7 0>;
+	};
+
+
+    bluedroid_pm {
+        bluedroid_pm,reset-gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(H, 5) 0>;
+    };
+
+	fixed-regulators {
+		regulator@1 {
+			gpio = <&tegra_main_gpio TEGRA_MAIN_GPIO(P, 6) 0>;
+                };
+	};
+
+	bpmp_i2c {
+		spmic@3c {
+			pinmux@0 {
+				pin_gpio2 {
+					status = "disabled";
+				};
+				pin_gpio3 {
+					status = "disabled";
+				};
+				pin_gpio7 {
+					drive-push-pull = <1>;
+				};
+			};
+
+			regulators {
+				ldo0 {
+					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
+				};
+
+				ldo6 {
+					maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				ldo7 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+				};
+
+				ldo8 {
+					regulator-name = "dvdd-pex";
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1000000>;
+				};
+			};
+		};
+	};
+
+
+};
+
+#if LINUX_VERSION >= 414
+#include <tegra186-linux-4.14.dtsi>
+#endif
+                   
diff --git a/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-mPCIe.dts b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-mPCIe.dts
new file mode 100644
index 0000000..1701ede
--- /dev/null
+++ b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-mPCIe.dts
@@ -0,0 +1,133 @@
+#include <tegra186-tx2-spiri-base.dts>
+#include <t18x-common-platforms/tegra186-tx2-spiri-camera-base.dtsi>
+/{
+    nvidia,dtsfilename = "tegra186-tx2-spiri-mPCIe.dts";
+
+    gpio@2200000 {
+    /*enable this to enabled PCIe Controller #2*/
+        pcie0_lane2_mux {
+             status = "okay";
+        };
+    /******************************************/
+    /*enable these two to enable USB3 Port 0*/
+        e3325_sdio_rst {
+           status = "disabled";
+        };
+        e3325_lane0_mux {
+            status = "disabled";
+        };
+    /******************************************/
+
+    };
+
+
+
+    xhci@3530000 {
+        status = "okay";
+        phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
+            <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
+            <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>,
+            <&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>;
+        phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-1";
+    };
+
+
+   xusb_padctl@3520000 {
+        pads {
+            usb2 {
+                lanes {
+                    usb2-0 {
+                        status = "okay";
+                    };
+                    usb2-1 {
+                        status = "okay";
+                    };
+                    usb2-2 {
+                        status = "okay";
+                    };
+                };
+            };
+            usb3 {
+                lanes {
+                    usb3-0 {
+                        status = "disabled";
+                    };
+                    usb3-1 {
+                        status = "okay";
+                    };
+                    usb3-2 {
+                        status = "disabled";
+                    };
+                };
+            };
+        };
+        ports {
+            usb2-0 {
+                status = "okay";
+            };
+            usb2-1 {
+                status = "okay";
+            };
+
+            usb2-2 {
+                status = "okay";
+            };
+
+            usb3-0 {
+                nvidia,usb2-companion = <0>;
+                status = "disabled";
+            };
+            usb3-1 {
+                nvidia,usb2-companion = <1>;
+                status = "okay";
+            };
+            usb3-2 {
+                nvidia,usb2-companion = <2>;
+                status = "disabled";
+            };
+        };
+    };
+    pinctrl@3520000 {
+        status = "okay";
+           pinmux {
+            usb2-port0 {
+                status = "okay";
+            };
+            usb2-port1 {
+                status = "okay";
+            };
+
+            usb2-port2 {
+                status = "okay";
+            };
+
+            usb3-port0 {
+                status = "disabled";
+            };
+
+            usb3-port1 {
+                status = "okay";
+            };
+
+            usb3-port2 {
+                status = "disabled";
+            };
+        };
+    };
+    pcie-controller@10003000 {
+        pci@1,0 {
+            nvidia,num-lanes = <1>;
+            status = "okay";
+        };
+        pci@2,0 {
+            nvidia,num-lanes = <0>;
+            status = "disabled";
+        };
+        pci@3,0 {
+            nvidia,num-lanes = <1>;
+            status = "okay";
+        };
+    };
+
+
+};
diff --git a/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-revF+.dts b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-revF+.dts
new file mode 100644
index 0000000..820460f
--- /dev/null
+++ b/hardware/nvidia-spiri/platform/t18x/quill/kernel-dts/tegra186-tx2-spiri-revF+.dts
@@ -0,0 +1,133 @@
+#include <tegra186-tx2-spiri-base.dts>
+#include <t18x-common-platforms/tegra186-tx2-spiri-camera.dtsi>
+/{
+    nvidia,dtsfilename = "tegra186-tx2-spiri-revF+.dts";
+
+    gpio@2200000 {
+    /*enable this to enabled PCIe Controller #2*/
+        pcie0_lane2_mux {
+             status = "okay";
+        };
+    /******************************************/
+    /*enable these two to enable USB3 Port 0*/
+        e3325_sdio_rst {
+           status = "disabled";
+        };
+        e3325_lane0_mux {
+            status = "disabled";
+        };
+    /******************************************/
+
+    };
+
+
+
+    xhci@3530000 {
+        status = "okay";
+        phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
+            <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
+            <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>,
+            <&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>;
+        phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-1";
+    };
+
+
+   xusb_padctl@3520000 {
+        pads {
+            usb2 {
+                lanes {
+                    usb2-0 {
+                        status = "okay";
+                    };
+                    usb2-1 {
+                        status = "okay";
+                    };
+                    usb2-2 {
+                        status = "okay";
+                    };
+                };
+            };
+            usb3 {
+                lanes {
+                    usb3-0 {
+                        status = "disabled";
+                    };
+                    usb3-1 {
+                        status = "okay";
+                    };
+                    usb3-2 {
+                        status = "disabled";
+                    };
+                };
+            };
+        };
+        ports {
+            usb2-0 {
+                status = "okay";
+            };
+            usb2-1 {
+                status = "okay";
+            };
+
+            usb2-2 {
+                status = "okay";
+            };
+
+            usb3-0 {
+                nvidia,usb2-companion = <0>;
+                status = "disabled";
+            };
+            usb3-1 {
+                nvidia,usb2-companion = <1>;
+                status = "okay";
+            };
+            usb3-2 {
+                nvidia,usb2-companion = <2>;
+                status = "disabled";
+            };
+        };
+    };
+    pinctrl@3520000 {
+        status = "okay";
+           pinmux {
+            usb2-port0 {
+                status = "okay";
+            };
+            usb2-port1 {
+                status = "okay";
+            };
+
+            usb2-port2 {
+                status = "okay";
+            };
+
+            usb3-port0 {
+                status = "disabled";
+            };
+
+            usb3-port1 {
+                status = "okay";
+            };
+
+            usb3-port2 {
+                status = "disabled";
+            };
+        };
+    };
+    pcie-controller@10003000 {
+        pci@1,0 {
+            nvidia,num-lanes = <2>;
+            status = "okay";
+        };
+        pci@2,0 {
+            nvidia,num-lanes = <1>;
+            status = "okay";
+        };
+        pci@3,0 {
+            nvidia,num-lanes = <1>;
+            status = "okay";
+        };
+    };
+
+
+};