/*
 * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 */

#include "tegra194-cpuidle.dtsi"

/ {
	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cl0_0>;
				};

				core1 {
					cpu = <&cl0_1>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&cl1_0>;
				};

				core1 {
					cpu = <&cl1_1>;
				};
			};

			cluster2 {
				core0 {
					cpu = <&cl2_0>;
				};

				core1 {
					cpu = <&cl2_1>;
				};
			};

			cluster3 {
				core0 {
					cpu = <&cl3_0>;
				};

				core1 {
					cpu = <&cl3_1>;
				};
			};
		};

		cl0_0: cpu@0 {
			device_type = "cpu";
			compatible = "nvidia,carmel", "arm,armv8";
			reg = <0x0 0x10000>;
			enable-method = "psci";
			cpu-idle-states = <&C6 &C7>;
			i-cache-size = <131072>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <65536>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			l2-cache = <&L2_0>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_CARMEL &CPU_COST_CARMEL>;
		};
		cl0_1: cpu@1 {
			device_type = "cpu";
			compatible = "nvidia,carmel", "arm,armv8";
			reg = <0x0 0x10001>;
			enable-method = "psci";
			cpu-idle-states = <&C6 &C7>;
			i-cache-size = <131072>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <65536>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			l2-cache = <&L2_0>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_CARMEL &CPU_COST_CARMEL>;
			status = "disabled";
		};
		cl1_0: cpu@2 {
			device_type = "cpu";
			compatible = "nvidia,carmel", "arm,armv8";
			reg = <0x0 0x100>;
			enable-method = "psci";
			cpu-idle-states = <&C6 &C7>;
			i-cache-size = <131072>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <65536>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			l2-cache = <&L2_1>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_CARMEL &CPU_COST_CARMEL>;
			status = "disabled";
		};
		cl1_1: cpu@3 {
			device_type = "cpu";
			compatible = "nvidia,carmel", "arm,armv8";
			reg = <0x0 0x101>;
			enable-method = "psci";
			cpu-idle-states = <&C6 &C7>;
			i-cache-size = <131072>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <65536>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			l2-cache = <&L2_1>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_CARMEL &CPU_COST_CARMEL>;
			status = "disabled";
		};
		cl2_0: cpu@4 {
			device_type = "cpu";
			compatible = "nvidia,carmel", "arm,armv8";
			reg = <0x0 0x200>;
			enable-method = "psci";
			cpu-idle-states = <&C6 &C7>;
			i-cache-size = <131072>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <65536>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			l2-cache = <&L2_2>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_CARMEL &CPU_COST_CARMEL>;
			status = "disabled";
		};
		cl2_1: cpu@5 {
			device_type = "cpu";
			compatible = "nvidia,carmel", "arm,armv8";
			reg = <0x0 0x201>;
			enable-method = "psci";
			cpu-idle-states = <&C6 &C7>;
			i-cache-size = <131072>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <65536>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			l2-cache = <&L2_2>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_CARMEL &CPU_COST_CARMEL>;
			status = "disabled";
		};
		cl3_0: cpu@6 {
			device_type = "cpu";
			compatible = "nvidia,carmel", "arm,armv8";
			reg = <0x0 0x10300>;
			enable-method = "psci";
			cpu-idle-states = <&C6 &C7>;
			i-cache-size = <131072>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <65536>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			l2-cache = <&L2_3>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_CARMEL &CPU_COST_CARMEL>;
			status = "disabled";
		};
		cl3_1: cpu@7 {
			device_type = "cpu";
			compatible = "nvidia,carmel", "arm,armv8";
			reg = <0x0 0x10301>;
			enable-method = "psci";
			cpu-idle-states = <&C6 &C7>;
			i-cache-size = <131072>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <65536>;
			d-cache-line-size = <64>;
			d-cache-sets = <256>;
			l2-cache = <&L2_3>;
			capacity-dmips-mhz = <1024>;
			sched-energy-costs = <&CPU_COST_CARMEL &CPU_COST_CARMEL>;
			status = "disabled";
		};
	};

	L2_0: l2-cache0 {
		cache-size = <2097152>;
		cache-line-size = <64>;
		cache-sets = <2048>;
		next-level-cache = <&L3>;
	};

	L2_1: l2-cache1 {
		cache-size = <2097152>;
		cache-line-size = <64>;
		cache-sets = <2048>;
		next-level-cache = <&L3>;
		status = "disabled";
	};

	L2_2: l2-cache2 {
		cache-size = <2097152>;
		cache-line-size = <64>;
		cache-sets = <2048>;
		next-level-cache = <&L3>;
		status = "disabled";
	};

	L2_3: l2-cache3 {
		cache-size = <2097152>;
		cache-line-size = <64>;
		cache-sets = <2048>;
		next-level-cache = <&L3>;
		status = "disabled";
	};

	L3: l3-cache {
		cache-size = <4194304>;
		cache-line-size = <64>;
		cache-sets = <4096>;
	};

	CPU_COST_CARMEL: core-cost1 {
		busy-cost-data = <1024 1024>;
		idle-cost-data = <128>;
	};
       	arm-pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <0 384 0x4>,
			     <0 385 0x4>,
			     <0 386 0x4>,
			     <0 387 0x4>,
			     <0 388 0x4>,
			     <0 389 0x4>,
			     <0 390 0x4>,
			     <0 391 0x4>;
		interrupt-affinity =	<&cl0_0>,
					<&cl0_1>,
					<&cl1_0>,
					<&cl1_1>,
					<&cl2_0>,
					<&cl2_1>,
					<&cl3_0>,
					<&cl3_1>;
		status = "disabled";
	};

	carmel-pmu {
		compatible = "nvidia,carmel-pmu";
		interrupts = <0 365 0x4>;
		interrupt-affinity = <&{/cpus/cpu@0}>;
		status = "okay";
	};
};