/*
 * Copyright (c) 2015-2019, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <dt-bindings/media/camera.h>
#include <dt-bindings/platform/t210/t210.h>

/ {
	host1x {
		vi@15700000 {
			num-channels = <2>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					e3323_vi_in0: endpoint {
						port-index = <0>;
						bus-width = <4>;
						remote-endpoint = <&e3323_csi_out0>;
					};
				};
				port@1 {
					reg = <1>;
					e3323_vi_in1: endpoint {
						port-index = <2>;
						bus-width = <4>;
						remote-endpoint = <&e3323_csi_out1>;
					};
				};
			};
		};

		nvcsi@150c0000 {
			num-channels = <2>;
			#address-cells = <1>;
			#size-cells = <0>;
			channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3323_csi_in0: endpoint@0 {
							port-index = <0>;
							bus-width = <4>;
							remote-endpoint = <&e3323_ov23850_out0>;
						};
					};
					port@1 {
						reg = <1>;
						e3323_csi_out0: endpoint@1 {
							remote-endpoint = <&e3323_vi_in0>;
						};
					};
				};
			};
			channel@1 {
				reg = <1>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3323_csi_in1: endpoint@2 {
							port-index = <2>;
							bus-width = <4>;
							remote-endpoint = <&e3323_ov23850_out1>;
						};
					};
					port@1 {
						reg = <1>;
						e3323_csi_out1: endpoint@3 {
							remote-endpoint = <&e3323_vi_in1>;
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		ov23850_a@10 {
			compatible = "nvidia,ov23850";
			reg = <0x10>;

			/* Physical dimensions of sensor */
			physical_w = "7.3998";
			physical_h = "5.5998";

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			dvdd-reg = "vdig";
			iovdd-reg = "vif";
			vcmvdd-reg = "vvcm";
			devnode = "video0";

			/**
			* A modeX node is required to support v4l2 driver
			* implementation with NVIDIA camera software stack
			*
			* mclk_khz = "";
			* Standard MIPI driving clock, typically 24MHz
			*
			* num_lanes = "";
			* Number of lane channels sensor is programmed to output
			*
			* tegra_sinterface = "";
			* The base tegra serial interface lanes are connected to
			*
			* discontinuous_clk = "";
			* The sensor is programmed to use a discontinuous clock on MIPI lanes
			*
			* dpcm_enable = "true";
			* The sensor is programmed to use a DPCM modes
			*
			* cil_settletime = "";
			* MIPI lane settle time value.
			* A "0" value attempts to autocalibrate based on mclk_multiplier
			*
			*
			*
			*
			* active_w = "";
			* Pixel active region width
			*
			* active_h = "";
			* Pixel active region height
			*
			* pixel_t = "";
			* The sensor readout pixel pattern
			*
			* readout_orientation = "0";
			* Based on camera module orientation.
			* Only change readout_orientation if you specifically
			* Program a different readout order for this mode
			*
			* line_length = "";
			* Pixel line length (width) for sensor mode.
			* This is used to calibrate features in our camera stack.
			*
			* mclk_multiplier = "";
			* Multiplier to MCLK to help time hardware capture sequence
			* TODO: Assign to PLL_Multiplier as well until fixed in core
			*
			* pix_clk_hz = "";
			* Sensor pixel clock used for calculations like exposure and framerate
			*
			*
			*
			* inherent_gain = "";
			* Gain obtained inherently from mode (ie. pixel binning)
			*
			* min_gain_val = "";
			* max_gain_val = "";
			* Gain limits for mode
			*
			* min_exp_time = "";
			* max_exp_time = "";
			* Exposure Time limits for mode (us)
			*
			*
			* min_hdr_ratio = "";
			* max_hdr_ratio = "";
			* HDR Ratio limits for mode
			*
			* min_framerate = "";
			* max_framerate = "";
			* Framerate limits for mode (fps)
			*
			*/

			mode0 { // OV23850_MODE_5632X3168
				mclk_khz = "24000";
				num_lanes = "4";
				tegra_sinterface = "serial_a";
				phy_mode = "DPHY";
				discontinuous_clk = "no";
				dpcm_enable = "false";
				cil_settletime = "0";

				active_w = "5632";
				active_h = "3168";
				mode_type = "bayer";
				pixel_phase = "bggr";
				csi_pixel_bit_depth = "10";
				readout_orientation = "270";
				line_length = "5922";
				inherent_gain = "1";
				mclk_multiplier = "25";
				pix_clk_hz = "600000000";

				min_gain_val = "1.0";
				max_gain_val = "15.5";
				min_hdr_ratio = "1";
				max_hdr_ratio = "1";
				min_framerate = "3.09135";
				max_framerate = "30";
				min_exp_time = "19.74";
				max_exp_time = "323094";
				embedded_metadata_height = "0";
			};
			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					e3323_ov23850_out0: endpoint {
						port-index = <0>;
						bus-width = <4>;
						remote-endpoint = <&e3323_csi_in0>;
					};
				};
			};
		};
	};

	i2c@c240000 {
		ov23850_c@36 {
			compatible = "nvidia,ov23850";
			reg = <0x36>;

			/* Physical dimensions of sensor */
			physical_w = "7.3998";
			physical_h = "5.5998";

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			dvdd-reg = "vdig";
			iovdd-reg = "vif";
			vcmvdd-reg = "vvcm";
			devnode = "video1";

			mode0 { // OV23850_MODE_5632X3168
				mclk_khz = "24000";
				num_lanes = "4";
				tegra_sinterface = "serial_c";
				phy_mode = "DPHY";
				discontinuous_clk = "no";
				dpcm_enable = "false";
				cil_settletime = "0";

				active_w = "5632";
				active_h = "3168";
				mode_type = "bayer";
				pixel_phase = "bggr";
				csi_pixel_bit_depth = "10";
				readout_orientation = "270";
				line_length = "5922";
				inherent_gain = "1";
				mclk_multiplier = "25";
				pix_clk_hz = "600000000";

				min_gain_val = "1.0";
				max_gain_val = "15.5";
				min_hdr_ratio = "1";
				max_hdr_ratio = "1";
				min_framerate = "3.09135";
				max_framerate = "30";
				min_exp_time = "19.74";
				max_exp_time = "323094";
				embedded_metadata_height = "0";
			};
			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					e3323_ov23850_out1: endpoint {
						port-index = <2>;
						bus-width = <4>;
						remote-endpoint = <&e3323_csi_in1>;
					};
				};
			};
		};
	};

	e3323_lens_ov23850@CH06P1 {
		min_focus_distance = "10.0"; /* 1.0f/0.1f */
		hyper_focal = "0.2"; /* 1.0f/5.0f */
		focal_length = "4.73";
		f_number = "2.2";
		aperture = "2.2";
	};

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <8>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <600000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
			module0 {
				badge = "e3323_bottom_CH06P1";
				position = "bottom";
				orientation = "3";
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ov23850 2-0010";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/ov23850_a@10";
				};
				drivernode1 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3323_lens_ov23850@CH06P1/";
				};
			};
			module1 {
				badge = "e3323_top_CH06P1";
				position = "top";
				orientation = "3";
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ov23850 1-0036";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@c240000/ov23850_c@36";
				};
				drivernode1 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3323_lens_ov23850@CH06P1/";
				};
			};
		};
	};
};