/* * arch/arm64/boot/dts/tegra186-soc/tegra186-a57-cpuidle.dtsi * * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ / { cpus { DENVER_CORE_POWER_STATES: denver_core_power_states { compatible = "nvidia,tegra186-cpuidle-denver"; DENVER_C1: c1 { compatible = "nvidia,tegra186-cpuidle-denver"; state-name = "Clock gated"; wakeup-latency-us = <1>; min-residency-us = <1>; power = <70>; pmstate = <0x1>; status = "okay"; }; DENVER_C6: c6 { compatible = "nvidia,tegra186-cpuidle-denver"; state-name = "Virtual core powergate"; wakeup-latency-us = <190>; min-residency-us = <0xffffffff>; power = <60>; pmstate = <0x6>; arm,psci-suspend-param= <0x6>; status = "okay"; }; DENVER_C7: c7 { compatible = "nvidia,tegra186-cpuidle-denver"; state-name = "Core powergate"; wakeup-latency-us = <560>; min-residency-us = <0xffffffff>; power = <60>; pmstate = <0x7>; arm,psci-suspend-param= <0x40000007>; status = "okay"; }; }; denver_cluster_power_states { compatible = "nvidia,tegra186-cpuidle-denver-cluster"; cc1 { state-name = "Cluster clock gated"; wakeup-latency-us = <1>; min-residency-us = <1>; power = <65>; pmstate = <0x1>; status = "okay"; }; cc6 { state-name = "Cluster powergate"; wakeup-latency-us = <450>; min-residency-us = <5000>; power = <19>; pmstate = <0x6>; status = "okay"; }; cc7 { state-name = "Cluster railgate"; wakeup-latency-us = <80>; min-residency-us = <800>; power = <5>; pmstate = <0x7>; status = "disabled"; }; }; denver_crossover_thresholds { compatible = "nvidia,tegra186-cpuidle-denver-thresholds"; thresholds { crossover_c1_c6 = <1000>; crossover_cc1_cc6 = <5000>; crossover_cc1_cc7 = <20000>; }; }; }; };