From 38e3da535f7c8bd3655a665e07e220b7d6302a6a Mon Sep 17 00:00:00 2001 From: Daniel Agar Date: Fri, 25 Jan 2019 10:04:04 -0500 Subject: [PATCH] boards/ delete unused stm32 nucleo-F767ZI example --- .ci/Jenkinsfile-compile | 3 +- Makefile | 1 - boards/stm/nucleo-F767ZI/default.cmake | 113 -- boards/stm/nucleo-F767ZI/firmware.prototype | 13 - .../nuttx-config/include/board.h | 573 ------ .../nucleo-F767ZI/nuttx-config/nsh/defconfig | 1699 ----------------- .../nuttx-config/scripts/ld.script | 180 -- boards/stm/nucleo-F767ZI/src/CMakeLists.txt | 50 - boards/stm/nucleo-F767ZI/src/board_config.h | 400 ---- boards/stm/nucleo-F767ZI/src/can.c | 129 -- boards/stm/nucleo-F767ZI/src/init.c | 272 --- boards/stm/nucleo-F767ZI/src/led.c | 229 --- boards/stm/nucleo-F767ZI/src/sdio.c | 176 -- boards/stm/nucleo-F767ZI/src/spi.c | 393 ---- boards/stm/nucleo-F767ZI/src/timer_config.c | 126 -- boards/stm/nucleo-F767ZI/src/usb.c | 105 - 16 files changed, 1 insertion(+), 4461 deletions(-) delete mode 100644 boards/stm/nucleo-F767ZI/default.cmake delete mode 100644 boards/stm/nucleo-F767ZI/firmware.prototype delete mode 100644 boards/stm/nucleo-F767ZI/nuttx-config/include/board.h delete mode 100644 boards/stm/nucleo-F767ZI/nuttx-config/nsh/defconfig delete mode 100644 boards/stm/nucleo-F767ZI/nuttx-config/scripts/ld.script delete mode 100644 boards/stm/nucleo-F767ZI/src/CMakeLists.txt delete mode 100644 boards/stm/nucleo-F767ZI/src/board_config.h delete mode 100644 boards/stm/nucleo-F767ZI/src/can.c delete mode 100644 boards/stm/nucleo-F767ZI/src/init.c delete mode 100644 boards/stm/nucleo-F767ZI/src/led.c delete mode 100644 boards/stm/nucleo-F767ZI/src/sdio.c delete mode 100644 boards/stm/nucleo-F767ZI/src/spi.c delete mode 100644 boards/stm/nucleo-F767ZI/src/timer_config.c delete mode 100644 boards/stm/nucleo-F767ZI/src/usb.c diff --git a/.ci/Jenkinsfile-compile b/.ci/Jenkinsfile-compile index 1508bb64b6..1afe252b49 100644 --- a/.ci/Jenkinsfile-compile +++ b/.ci/Jenkinsfile-compile @@ -95,8 +95,7 @@ pipeline { ] def nuttx_builds_other = [ - target: ["px4_cannode-v1_default", - "px4_esc-v1_default", "stm_nucleo-F767ZI_default", "thiemar_s2740vc-v1_default"], + target: ["px4_cannode-v1_default", "px4_esc-v1_default", "thiemar_s2740vc-v1_default"], image: docker_images.nuttx, archive: false ] diff --git a/Makefile b/Makefile index fea736b61e..a1b1448f0b 100644 --- a/Makefile +++ b/Makefile @@ -244,7 +244,6 @@ alt_firmware: \ check_px4_cannode-v1_default \ check_px4_esc-v1_default \ check_auav_esc35-v1_default \ - check_stm_nucleo-F767ZI_default \ check_thiemar_s2740vc-v1_default \ sizes diff --git a/boards/stm/nucleo-F767ZI/default.cmake b/boards/stm/nucleo-F767ZI/default.cmake deleted file mode 100644 index 648d063eec..0000000000 --- a/boards/stm/nucleo-F767ZI/default.cmake +++ /dev/null @@ -1,113 +0,0 @@ - -px4_add_board( - PLATFORM nuttx - VENDOR stm - MODEL nucleo-F767ZI - TOOLCHAIN arm-none-eabi - ARCHITECTURE cortex-m7 - ROMFSROOT px4fmu_common - TESTING - #UAVCAN_INTERFACES 2 - - DRIVERS - barometer # all available barometer drivers - batt_smbus - camera_trigger - differential_pressure # all available differential pressure drivers - distance_sensor # all available distance sensor drivers - gps - #heater - imu/adis16448 - #imu # all available imu drivers - imu/mpu6000 - irlock - lights/blinkm - lights/oreoled - lights/rgbled - #lights/rgbled_pwm - magnetometer # all available magnetometer drivers - #md25 - mkblctrl - lights/pca8574 - pca9685 - #pmw3901 - protocol_splitter - pwm_input - pwm_out_sim - px4flow - px4fmu - rc_input - roboclaw - stm32 - stm32/adc - stm32/tone_alarm - tap_esc - telemetry # all available telemetry drivers - test_ppm - #uavcan - - MODULES - attitude_estimator_q - camera_feedback - commander - dataman - ekf2 - events - fw_att_control - fw_pos_control_l1 - gnd_att_control - gnd_pos_control - land_detector - landing_target_estimator - load_mon - local_position_estimator - logger - mavlink - mc_att_control - mc_pos_control - navigator - position_estimator_inav - sensors - vmount - vtol_att_control - wind_estimator - - SYSTEMCMDS - bl_update - config - dumpfile - esc_calib - hardfault_log - led_control - mixer - motor_ramp - motor_test - mtd - nshterm - param - perf - pwm - reboot - reflect - sd_bench - shutdown - tests # tests and test runner - top - topic_listener - tune_control - usb_connected - ver - - EXAMPLES - bottle_drop # OBC challenge - fixedwing_control # Tutorial code from https://px4.io/dev/example_fixedwing_control - hello - hwtest # Hardware test - #matlab_csv_serial - px4_mavlink_debug # Tutorial code from https://px4.io/dev/debug_values - px4_simple_app # Tutorial code from https://px4.io/dev/px4_simple_app - rover_steering_control # Rover example app - segway - uuv_example_app - - ) diff --git a/boards/stm/nucleo-F767ZI/firmware.prototype b/boards/stm/nucleo-F767ZI/firmware.prototype deleted file mode 100644 index a475f7170a..0000000000 --- a/boards/stm/nucleo-F767ZI/firmware.prototype +++ /dev/null @@ -1,13 +0,0 @@ -{ - "board_id": 90, - "magic": "PX4FWv1", - "description": "Firmware for the ST nucleo-144 with STM32F767ZI board", - "image": "", - "build_time": 0, - "summary": "STMNUCLEO-F767ZI", - "version": "0.1", - "image_size": 0, - "image_maxsize": 2097152, - "git_identity": "", - "board_revision": 0 -} diff --git a/boards/stm/nucleo-F767ZI/nuttx-config/include/board.h b/boards/stm/nucleo-F767ZI/nuttx-config/include/board.h deleted file mode 100644 index a8ce694f18..0000000000 --- a/boards/stm/nucleo-F767ZI/nuttx-config/include/board.h +++ /dev/null @@ -1,573 +0,0 @@ -/************************************************************************************ - * nuttx-configs/stmnucleo-F767ZI/include/board.h - * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: David Sidrane - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ -#ifndef __NUTTX_CONFIG_PX4NUCLEOF767ZI_V1_BOARD_HINCLUDE_BOARD_H -#define __NUTTX_CONFIG_PX4NUCLEOF767ZI_V1_BOARD_HINCLUDE_BOARD_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#ifndef __ASSEMBLY__ -# include -#endif - -#include "stm32_rcc.h" -#include "stm32_sdmmc.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Clocking *************************************************************************/ -/* The px4nucleoF767ZI-v1 board provides the following clock sources: - * - * MCO: 8 MHz from MCO output of ST-LINK is used as input clock - * X2: 32.768 KHz crystal for LSE - * X3: HSE crystal oscillator (not provided) - * - * So we have these clock source available within the STM32 - * - * HSI: 16 MHz RC factory-trimmed - * LSI: 32 KHz RC - * HSE: 8 MHz from MCO output of ST-LINK - * LSE: 32.768 kHz - */ - -#define STM32_BOARD_XTAL 8000000ul - -#define STM32_HSI_FREQUENCY 16000000ul -#define STM32_LSI_FREQUENCY 32000 -#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL -#define STM32_LSE_FREQUENCY 32768 - -/* Main PLL Configuration. - * - * PLL source is HSE = 8,000,000 - * - * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN - * Subject to: - * - * 2 <= PLLM <= 63 - * 192 <= PLLN <= 432 - * 192 MHz <= PLL_VCO <= 432MHz - * - * SYSCLK = PLL_VCO / PLLP - * Subject to - * - * PLLP = {2, 4, 6, 8} - * SYSCLK <= 216 MHz - * - * USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ - * Subject to - * The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC - * and the random number generator need a frequency lower than or equal - * to 48 MHz to work correctly. - * - * 2 <= PLLQ <= 15 - */ - -/* Highest SYSCLK with USB OTG FS clock = 48 MHz - * - * PLL_VCO = (8,000,000 / 4) * 216 = 432 MHz - * SYSCLK = 432 MHz / 2 = 216 MHz - * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 9 = 48 MHz - */ - -#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(4) -#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(216) -#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 -#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(9) - -#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 4) * 216) -#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) -#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 9) - -/* Configure factors for PLLSAI clock */ - -#define CONFIG_STM32F7_PLLSAI 1 -#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(192) -#define STM32_RCC_PLLSAICFGR_PLLSAIP RCC_PLLSAICFGR_PLLSAIP(8) -#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(4) -#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(2) - -/* Configure Dedicated Clock Configuration Register */ - -#define STM32_RCC_DCKCFGR1_PLLI2SDIVQ RCC_DCKCFGR1_PLLI2SDIVQ(1) -#define STM32_RCC_DCKCFGR1_PLLSAIDIVQ RCC_DCKCFGR1_PLLSAIDIVQ(1) -#define STM32_RCC_DCKCFGR1_PLLSAIDIVR RCC_DCKCFGR1_PLLSAIDIVR(0) -#define STM32_RCC_DCKCFGR1_SAI1SRC RCC_DCKCFGR1_SAI1SEL(0) -#define STM32_RCC_DCKCFGR1_SAI2SRC RCC_DCKCFGR1_SAI2SEL(0) -#define STM32_RCC_DCKCFGR1_TIMPRESRC 0 -#define STM32_RCC_DCKCFGR1_DFSDM1SRC 0 -#define STM32_RCC_DCKCFGR1_ADFSDM1SRC 0 - - - -/* Configure factors for PLLI2S clock */ - -#define CONFIG_STM32F7_PLLI2S 1 -#define STM32_RCC_PLLI2SCFGR_PLLI2SN RCC_PLLI2SCFGR_PLLI2SN(192) -#define STM32_RCC_PLLI2SCFGR_PLLI2SP RCC_PLLI2SCFGR_PLLI2SP(2) -#define STM32_RCC_PLLI2SCFGR_PLLI2SQ RCC_PLLI2SCFGR_PLLI2SQ(2) -#define STM32_RCC_PLLI2SCFGR_PLLI2SR RCC_PLLI2SCFGR_PLLI2SR(2) - -/* Configure Dedicated Clock Configuration Register 2 */ - -#define STM32_RCC_DCKCFGR2_USART1SRC RCC_DCKCFGR2_USART1SEL_APB -#define STM32_RCC_DCKCFGR2_USART2SRC RCC_DCKCFGR2_USART2SEL_APB -#define STM32_RCC_DCKCFGR2_UART4SRC RCC_DCKCFGR2_UART4SEL_APB -#define STM32_RCC_DCKCFGR2_UART5SRC RCC_DCKCFGR2_UART5SEL_APB -#define STM32_RCC_DCKCFGR2_USART6SRC RCC_DCKCFGR2_USART6SEL_APB -#define STM32_RCC_DCKCFGR2_UART7SRC RCC_DCKCFGR2_UART7SEL_APB -#define STM32_RCC_DCKCFGR2_UART8SRC RCC_DCKCFGR2_UART8SEL_APB -#define STM32_RCC_DCKCFGR2_I2C1SRC RCC_DCKCFGR2_I2C1SEL_HSI -#define STM32_RCC_DCKCFGR2_I2C2SRC RCC_DCKCFGR2_I2C2SEL_HSI -#define STM32_RCC_DCKCFGR2_I2C3SRC RCC_DCKCFGR2_I2C3SEL_HSI -#define STM32_RCC_DCKCFGR2_I2C4SRC RCC_DCKCFGR2_I2C4SEL_HSI -#define STM32_RCC_DCKCFGR2_LPTIM1SRC RCC_DCKCFGR2_LPTIM1SEL_APB -#define STM32_RCC_DCKCFGR2_CECSRC RCC_DCKCFGR2_CECSEL_HSI -#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLL -#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ -#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ -#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_PHY - - -/* Several prescalers allow the configuration of the two AHB buses, the - * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum - * frequency of the two AHB buses is 216 MHz while the maximum frequency of - * the high-speed APB domains is 108 MHz. The maximum allowed frequency of - * the low-speed APB domain is 54 MHz. - */ - -/* AHB clock (HCLK) is SYSCLK (216 MHz) */ - -#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ -#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY -#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */ - -/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */ - -#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ -#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) - -/* Timers driven from APB1 will be twice PCLK1 */ - -#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) - -/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */ - -#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ -#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) - -/* Timers driven from APB2 will be twice PCLK2 */ - -#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) - -/* SDMMC dividers. Note that slower clocking is required when DMA is disabled - * in order to avoid RX overrun/TX underrun errors due to delayed responses - * to service FIFOs in interrupt driven mode. These values have not been - * tuned!!! - * - * SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(118+2)=400 KHz - */ - -/* Use the Falling edge of the SDIO_CLK clock to change the edge the - * data and commands are change on - */ -#define STM32_SDMMC_CLKCR_EDGE STM32_SDMMC_CLKCR_NEGEDGE - -#define STM32_SDMMC_INIT_CLKDIV (118 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) - -/* DMA ON: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(1+2)=16 MHz - * DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz - */ - -#ifdef CONFIG_STM32_SDIO_DMA -# define STM32_SDMMC_MMCXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) -#else -# define STM32_SDMMC_MMCXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) -#endif - -/* DMA ON: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(1+2)=16 MHz - * DMA OFF: SDMMCCLK=48MHz, SDMMC_CK=SDMMCCLK/(2+2)=12 MHz - */ -//TODO #warning "Check Freq for 24mHz" - -#ifdef CONFIG_STM32_SDIO_DMA -# define STM32_SDMMC_SDXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) -#else -# define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT) -#endif - -/* DMA Channl/Stream Selections *****************************************************/ -/* Stream selections are arbitrary for now but might become important in the future - * if we set aside more DMA channels/streams. - * - * SDMMC DMA is on DMA2 - * - * SDMMC1 DMA - * DMAMAP_SDMMC1_1 = Channel 4, Stream 3 <- may later be used by SPI DMA - * DMAMAP_SDMMC1_2 = Channel 4, Stream 6 - */ - -#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1 - - -/* FLASH wait states - * - * --------- ---------- ----------- - * VDD MAX SYSCLK WAIT STATES - * --------- ---------- ----------- - * 1.7-2.1 V 180 MHz 8 - * 2.1-2.4 V 216 MHz 9 - * 2.4-2.7 V 216 MHz 8 - * 2.7-3.6 V 216 MHz 7 - * --------- ---------- ----------- - */ - -#define BOARD_FLASH_WAITSTATES 7 - -/* LED definitions ******************************************************************/ -/* The px4nucleoF767ZI-v1 board has numerous LEDs but only three, LD1 a Green LED, LD2 a Blue - * LED and LD3 a Red LED, that can be controlled by software. The following - * definitions assume the default Solder Bridges are installed. - * - * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. - * The following definitions are used to access individual LEDs. - */ - -/* LED index values for use with board_userled() */ - -#define BOARD_LED1 0 -#define BOARD_LED2 1 -#define BOARD_LED3 2 -#define BOARD_NLEDS 3 - -#define BOARD_LED_GREEN BOARD_LED1 -#define BOARD_LED_BLUE BOARD_LED2 -#define BOARD_LED_RED BOARD_LED3 - -/* LED bits for use with board_userled_all() */ - -#define BOARD_LED1_BIT (1 << BOARD_LED1) -#define BOARD_LED2_BIT (1 << BOARD_LED2) -#define BOARD_LED3_BIT (1 << BOARD_LED3) - -/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in - * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related - * events as follows: - * - * - * SYMBOL Meaning LED state - * Red Green Blue - * ---------------------- -------------------------- ------ ------ ----*/ - -#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ -#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */ -#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */ -#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */ -#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */ -#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */ -#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */ -#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */ -#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */ - -/* Thus if the Green LED is statically on, NuttX has successfully booted and - * is, apparently, running normally. If the Red LED is flashing at - * approximately 2Hz, then a fatal error has been detected and the system - * has halted. - */ - -/* Button definitions ***************************************************************/ -/* The STM32F7 Discovery supports one button: Pushbutton B1, labeled "User", is - * connected to GPIO PI11. A high value will be sensed when the button is depressed. - */ - -#define BUTTON_USER 0 -#define NUM_BUTTONS 1 -#define BUTTON_USER_BIT (1 << BUTTON_USER) -/* Alternate function pin selections ************************************************/ - -#define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7[CN11-21] CONFLICT w/ BLUE LED*/ -#define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6[CN12-17] */ - -#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6[CN11-43] */ -#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5[CN11-41] */ -#define GPIO_USART2_RTS GPIO_USART2_RTS_2 /* PD4[CN11-39] */ -#define GPIO_USART2_CTS GPIO_USART2_CTS_2 /* PD3[CN11-40] */ - -#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9[CN11-69] */ -#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8[CN12-10] */ -#define GPIO_USART3_RTS GPIO_USART3_RTS_2 /* PD12[CN12-43] */ -#define GPIO_USART3_CTS GPIO_USART3_CTS_2 /* PD11[CN12-45] */ -#if !defined(CONFIG_STM32F7_CAN1) && defined(CONFIG_STM32F7_UART4) -# define GPIO_UART4_RX GPIO_UART4_RX_4 /* PD0[CN11-57] */ -# define GPIO_UART4_TX GPIO_UART4_TX_4 /* PD1[CN11-55] */ -#endif -#define GPIO_USART6_RX GPIO_USART6_RX_2 /* PG9[CN11-63] */ -#define GPIO_USART6_TX GPIO_USART6_TX_2 /* PG14[CN12-61] */ -#define GPIO_USART6_RTS GPIO_USART6_RTS_2 /* PG8[CN12-66] */ -#define GPIO_USART6_CTT GPIO_USART6_CTS_2 /* PG15[CN11-64 */ - -#define GPIO_UART7_RX GPIO_UART7_RX_2 /* PF6[CN11-9] */ -#define GPIO_UART7_TX GPIO_UART7_TX_1 /* PE8[CN12-40] */ - -/* USART8: - * - * This configurations assume that you are connecting to the Morpho connector - * with the serial interface with the adaptor's RX on pin CN11 pin 64 and - * TX on pin CN11 pin 61 - * - * USART8: has no remap - * - * GPIO_UART7_RX PE0[CN12-64] - * GPIO_UART7_TX PE1[CN11-61] - */ - -/* UART RX DMA configurations */ - -#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 -#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 - -/* CAN - * - * CAN1 is routed to the Morpho connector. - * CAN2 is routed to the Morpho connector. - * CAN3 is routed to the Morpho connector. - */ -/* The 144 pin package is conflicted with UART4 */ -#if defined(CONFIG_STM32F7_CAN1) && !defined(CONFIG_STM32F7_UART4) -# define GPIO_CAN1_RX GPIO_CAN1_RX_3 /* PD0[CN11-57] */ -# define GPIO_CAN1_TX GPIO_CAN1_TX_3 /* PD1[CN11-55] */ -#endif -#define GPIO_CAN2_RX GPIO_CAN2_RX_1 /* PB12[CN12-16] */ -#define GPIO_CAN2_TX GPIO_CAN2_TX_1 /* PB13[CN12-30] */ -#define GPIO_CAN3_RX GPIO_CAN3_RX_1 /* PA8[CN12-23] */ -#define GPIO_CAN3_TX GPIO_CAN3_TX_1 /* PA15[CN11-17] */ - -#if defined(CONFIG_STM32F7_CAN1) && defined(CONFIG_STM32F7_UART4) -#warning "On The 144 pin package CAN1 is conflicted with UART4!" -#endif - -/* SPI - * N.B. 144 pinout limits access to SPI 2 - * There are sensors on SPI1, and SPI4 is connected to the FRAM. - * BARO is on SPI5 for isolation. - * SPI6 Reserved - * - */ - -#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6[CN12-13] */ -#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_3 /* PD7[CN11-45] */ -#define GPIO_SPI1_SCK GPIO_SPI1_SCK_3 /* PG11[CN11-79s] */ - -#define GPIO_SPI4_MISO GPIO_SPI4_MISO_2 /* PE13[CN12-55] */ -#define GPIO_SPI4_MOSI GPIO_SPI4_MOSI_1 /* PE6[CN11-62] */ -#define GPIO_SPI4_SCK GPIO_SPI4_SCK_1 /* PE2[CN11-46] */ - -#define GPIO_SPI5_MISO GPIO_SPI5_MISO_1 /* PF8[CN11-54] */ -#define GPIO_SPI5_MOSI GPIO_SPI5_MOSI_1 /* PF9[CN11-56] */ -#define GPIO_SPI5_SCK GPIO_SPI5_SCK_1 /* PF7[CN11-11] */ - -#define GPIO_SPI6_MISO GPIO_SPI6_MISO_1 /* PG12[CN11-65] */ -#define GPIO_SPI6_MOSI GPIO_SPI6_MOSI_3 /* PB5[CN12-29] */ -#define GPIO_SPI6_SCK GPIO_SPI6_SCK_1 /* PG13[CN11-68] */ - -/* I2C - * - * Each I2C is associated with a U[S]ART - * hence the naming I2C2_SDA_UART4 in FMU USAGE spreadsheet - * - * PF1 can not be used on Morpho connector without SB mods. - * see PH1/PF1, SP148, SB163 On schematic - * - * I2C3 is not pined out on FMUv5 on 144 pin packages - * - * The optional _GPIO configurations allow the I2C driver to manually - * reset the bus to clear stuck slaves. They match the pin configuration, - * but are normally-high GPIOs. - * - */ - -#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 /* PB8[CN12-3] */ -#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 /* PB9[CN12-5] */ - -#define GPIO_I2C1_SCL_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN8) -#define GPIO_I2C1_SDA_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9) - -/* PF1 can not be used on Morpho connector without SB mods. */ -#if defined(CONFIG_STM32F7_I2C2) -# warning "PF1 can not be used on Morpho connector without SB mods." -#endif -#define GPIO_I2C2_SCL GPIO_I2C2_SCL_2 /* PF1[CN11-51] */ -#define GPIO_I2C2_SDA GPIO_I2C2_SDA_2 /* PF0[CN11-53] */ - -#define GPIO_I2C2_SCL_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET |GPIO_PORTF | GPIO_PIN1) -#define GPIO_I2C2_SDA_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET |GPIO_PORTF | GPIO_PIN0) - -#define GPIO_I2C4_SCL GPIO_I2C4_SCL_2 /* PF14[CN12-50] */ -#define GPIO_I2C4_SDA GPIO_I2C4_SDA_2 /* PF15[CN12-60] */ - -#define GPIO_I2C4_SCL_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN14) -#define GPIO_I2C4_SDA_GPIO (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTF | GPIO_PIN14) - -/* SDMMC1 - * - * VDD 3.3 [CN11-5] - * GND [CN11-8] - * SDMMC1_CK PC12[CN11-3] - * SDMMC1_CMD PD2[CN11-4] - * SDMMC1_D0 PC8[CN12-2] - * SDMMC1_D1 PC9[CN12-1] - * SDMMC1_D2 PC10[CN11-1] - * SDMMC1_D3 PC11[CN11-2] - * GPIO_SDMMC1_NCD PG0[CN11-69] - */ - -/* USB - * - * OTG_FS_DM PA11[CN12-14] - * OTG_FS_DP PA12[CN12-12] - * VBUS PA9[CN12-21] - */ - - -/* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins: - * - * STM32 F7 BOARD LAN8742A - * GPIO SIGNAL PIN NAME - * -------- ------------ ------------- - * PG11 RMII_TX_EN TXEN - * PG13 RMII_TXD0 TXD0 - * PG14 RMII_TXD1 TXD1 - * PC4 RMII_RXD0 RXD0/MODE0 - * PC5 RMII_RXD1 RXD1/MODE1 - * PG2 RMII_RXER RXER/PHYAD0 -- Not used - * PA7 RMII_CRS_DV CRS_DV/MODE2 - * PC1 RMII_MDC MDC - * PA2 RMII_MDIO MDIO - * N/A NRST nRST - * PA1 RMII_REF_CLK nINT/REFCLK0 - * N/A OSC_25M XTAL1/CLKIN - * - * The PHY address is either 0 or 1, depending on the state of PG2 on reset. - * PG2 is not controlled but appears to result in a PHY address of 0. - */ - -#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2 -#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2 -#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2 - - -/* Board provides GPIO or other Hardware for signaling to timing analyzer */ - -#if defined(CONFIG_BOARD_USE_PROBES) -# define PROBE_N(n) (1<<((n)-1)) -# define PROBE_1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14) /* PE14[CN12-51] */ -# define PROBE_2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13) /* PE13[CN12-55] */ -# define PROBE_3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11) /* PE11[CN12-56] */ -# define PROBE_4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9) /* PE9[CN12-52] */ -# define PROBE_5 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13) /* PD13[CN12-41] */ -# define PROBE_6 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14) /* PD14[CN12-46] */ - -# define PROBE_INIT(mask) \ - do { \ - if ((mask)& PROBE_N(1)) { stm32_configgpio(PROBE_1); } \ - if ((mask)& PROBE_N(2)) { stm32_configgpio(PROBE_2); } \ - if ((mask)& PROBE_N(3)) { stm32_configgpio(PROBE_3); } \ - if ((mask)& PROBE_N(4)) { stm32_configgpio(PROBE_4); } \ - if ((mask)& PROBE_N(5)) { stm32_configgpio(PROBE_5); } \ - if ((mask)& PROBE_N(6)) { stm32_configgpio(PROBE_6); } \ - } while(0) - -# define PROBE(n,s) do {stm32_gpiowrite(PROBE_##n,(s));}while(0) -# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true) -#else -# define PROBE_INIT(mask) -# define PROBE(n,s) -# define PROBE_MARK(n) -#endif - -/************************************************************************************ - * Public Data - ************************************************************************************/ -#ifndef __ASSEMBLY__ - -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif - -/************************************************************************************ - * Public Function Prototypes - ************************************************************************************/ - -/************************************************************************************ - * Name: stm32_boardinitialize - * - * Description: - * All STM32 architectures must provide the following entry point. This entry point - * is called early in the initialization -- after all memory has been configured - * and mapped but before any devices have been initialized. - * - ************************************************************************************/ - -void stm32_boardinitialize(void); - -#undef EXTERN -#if defined(__cplusplus) -} -#endif - -#endif /* __ASSEMBLY__ */ -#endif /*__NUTTX_CONFIG_PX4NUCLEOF767ZI_V1_BOARD_HINCLUDE_BOARD_H */ diff --git a/boards/stm/nucleo-F767ZI/nuttx-config/nsh/defconfig b/boards/stm/nucleo-F767ZI/nuttx-config/nsh/defconfig deleted file mode 100644 index 015ba9015c..0000000000 --- a/boards/stm/nucleo-F767ZI/nuttx-config/nsh/defconfig +++ /dev/null @@ -1,1699 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Nuttx/ Configuration -# - -# -# Build Setup -# -# CONFIG_EXPERIMENTAL is not set -CONFIG_DEFAULT_SMALL=y -CONFIG_HOST_LINUX=y -# CONFIG_HOST_MACOS is not set -# CONFIG_HOST_WINDOWS is not set -# CONFIG_HOST_OTHER is not set - -# -# Build Configuration -# -CONFIG_APPS_DIR="../apps" -# CONFIG_BUILD_LOADABLE is not set -CONFIG_BUILD_FLAT=y -# CONFIG_BUILD_2PASS is not set - -# -# Binary Output Formats -# -# CONFIG_RRLOAD_BINARY is not set -# CONFIG_INTELHEX_BINARY is not set -# CONFIG_MOTOROLA_SREC is not set -CONFIG_RAW_BINARY=y -# CONFIG_UBOOT_UIMAGE is not set -# CONFIG_DFU_BINARY is not set - -# -# Customize Header Files -# -# CONFIG_ARCH_STDINT_H is not set -# CONFIG_ARCH_STDBOOL_H is not set -CONFIG_ARCH_MATH_H=y -# CONFIG_ARCH_FLOAT_H is not set -# CONFIG_ARCH_STDARG_H is not set -# CONFIG_ARCH_DEBUG_H is not set - -# -# Debug Options -# -CONFIG_DEBUG_ALERT=y -# CONFIG_DEBUG_FEATURES is not set -CONFIG_ARCH_HAVE_STACKCHECK=y -CONFIG_STACK_COLORATION=y -CONFIG_ARCH_HAVE_HEAPCHECK=y -# CONFIG_HEAP_COLORATION is not set -CONFIG_DEBUG_SYMBOLS=y -CONFIG_ARCH_HAVE_CUSTOMOPT=y -# CONFIG_DEBUG_NOOPT is not set -# CONFIG_DEBUG_CUSTOMOPT is not set -CONFIG_DEBUG_FULLOPT=y - -# -# System Type -# -CONFIG_ARCH_ARM=y -# CONFIG_ARCH_AVR is not set -# CONFIG_ARCH_HC is not set -# CONFIG_ARCH_MIPS is not set -# CONFIG_ARCH_MISOC is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_RISCV is not set -# CONFIG_ARCH_SIM is not set -# CONFIG_ARCH_X86 is not set -# CONFIG_ARCH_XTENSA is not set -# CONFIG_ARCH_Z16 is not set -# CONFIG_ARCH_Z80 is not set -# CONFIG_ARCH_OR1K is not set -CONFIG_ARCH="arm" - -# -# ARM Options -# -# CONFIG_ARCH_CHIP_A1X is not set -# CONFIG_ARCH_CHIP_BCM2708 is not set -# CONFIG_ARCH_CHIP_C5471 is not set -# CONFIG_ARCH_CHIP_DM320 is not set -# CONFIG_ARCH_CHIP_EFM32 is not set -# CONFIG_ARCH_CHIP_IMX1 is not set -# CONFIG_ARCH_CHIP_IMX6 is not set -# CONFIG_ARCH_CHIP_IMXRT is not set -# CONFIG_ARCH_CHIP_KINETIS is not set -# CONFIG_ARCH_CHIP_KL is not set -# CONFIG_ARCH_CHIP_LC823450 is not set -# CONFIG_ARCH_CHIP_LM is not set -# CONFIG_ARCH_CHIP_LPC11XX is not set -# CONFIG_ARCH_CHIP_LPC17XX is not set -# CONFIG_ARCH_CHIP_LPC214X is not set -# CONFIG_ARCH_CHIP_LPC2378 is not set -# CONFIG_ARCH_CHIP_LPC31XX is not set -# CONFIG_ARCH_CHIP_LPC43XX is not set -# CONFIG_ARCH_CHIP_LPC54XX is not set -# CONFIG_ARCH_CHIP_MAX326XX is not set -# CONFIG_ARCH_CHIP_MOXART is not set -# CONFIG_ARCH_CHIP_NRF52 is not set -# CONFIG_ARCH_CHIP_NUC1XX is not set -# CONFIG_ARCH_CHIP_SAMA5 is not set -# CONFIG_ARCH_CHIP_SAMD2X is not set -# CONFIG_ARCH_CHIP_SAML2X is not set -# CONFIG_ARCH_CHIP_SAMD5X is not set -# CONFIG_ARCH_CHIP_SAME5X is not set -# CONFIG_ARCH_CHIP_SAM34 is not set -# CONFIG_ARCH_CHIP_SAMV7 is not set -# CONFIG_ARCH_CHIP_STM32 is not set -# CONFIG_ARCH_CHIP_STM32F0 is not set -# CONFIG_ARCH_CHIP_STM32L0 is not set -CONFIG_ARCH_CHIP_STM32F7=y -# CONFIG_ARCH_CHIP_STM32H7 is not set -# CONFIG_ARCH_CHIP_STM32L4 is not set -# CONFIG_ARCH_CHIP_STR71X is not set -# CONFIG_ARCH_CHIP_TMS570 is not set -# CONFIG_ARCH_CHIP_TIVA is not set -# CONFIG_ARCH_CHIP_XMC4 is not set -# CONFIG_ARCH_ARM7TDMI is not set -# CONFIG_ARCH_ARM920T is not set -# CONFIG_ARCH_ARM926EJS is not set -# CONFIG_ARCH_ARM1136J is not set -# CONFIG_ARCH_ARM1156T2 is not set -# CONFIG_ARCH_ARM1176JZ is not set -# CONFIG_ARCH_CORTEXM0 is not set -# CONFIG_ARCH_CORTEXM23 is not set -# CONFIG_ARCH_CORTEXM3 is not set -# CONFIG_ARCH_CORTEXM33 is not set -# CONFIG_ARCH_CORTEXM4 is not set -CONFIG_ARCH_CORTEXM7=y -# CONFIG_ARCH_CORTEXA5 is not set -# CONFIG_ARCH_CORTEXA8 is not set -# CONFIG_ARCH_CORTEXA9 is not set -# CONFIG_ARCH_CORTEXR4 is not set -# CONFIG_ARCH_CORTEXR4F is not set -# CONFIG_ARCH_CORTEXR5 is not set -# CONFIG_ARCH_CORTEXR5F is not set -# CONFIG_ARCH_CORTEXR7 is not set -# CONFIG_ARCH_CORTEXR7F is not set -CONFIG_ARCH_FAMILY="armv7-m" -CONFIG_ARCH_CHIP="stm32f7" -CONFIG_ARCH_HAVE_FPU=y -CONFIG_ARCH_HAVE_DPFPU=y -CONFIG_ARCH_HAVE_LAZYFPU=y -CONFIG_ARCH_FPU=y -CONFIG_ARCH_DPFPU=y -# CONFIG_ARCH_HAVE_TRUSTZONE is not set -CONFIG_ARM_HAVE_MPU_UNIFIED=y -# CONFIG_ARM_MPU is not set -CONFIG_ARCH_HAVE_HARDFAULT_DEBUG=y -CONFIG_DEBUG_HARDFAULT_ALERT=y -CONFIG_ARCH_HAVE_MEMFAULT_DEBUG=y -# CONFIG_ARM_SEMIHOSTING_SYSLOG is not set - -# -# ARMV7M Configuration Options -# -CONFIG_ARMV7M_HAVE_ICACHE=y -CONFIG_ARMV7M_HAVE_DCACHE=y -# CONFIG_ARMV7M_LAZYFPU is not set -CONFIG_ARMV7M_USEBASEPRI=y -CONFIG_ARMV7M_BASEPRI_WAR=y -CONFIG_ARMV7M_ICACHE=y -CONFIG_ARMV7M_DCACHE=y -CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y -CONFIG_ARMV7M_HAVE_ITCM=y -CONFIG_ARMV7M_HAVE_DTCM=y -# CONFIG_ARMV7M_ITCM is not set -CONFIG_ARMV7M_DTCM=y -# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set -# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set -CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_ARMV7M_TOOLCHAIN_CLANGL is not set -CONFIG_ARMV7M_HAVE_STACKCHECK=y -# CONFIG_ARMV7M_STACKCHECK is not set -# CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_USART1_RS485 is not set -CONFIG_USART1_RXDMA=y -# CONFIG_USART2_RS485 is not set -CONFIG_USART2_RXDMA=y -# CONFIG_USART3_RS485 is not set -CONFIG_USART3_RXDMA=y -# CONFIG_USART6_RS485 is not set -CONFIG_USART6_RXDMA=y -# CONFIG_UART7_RS485 is not set -# CONFIG_UART7_RXDMA is not set -# CONFIG_UART8_RS485 is not set -CONFIG_UART8_RXDMA=y - -# -# STM32 F7 Configuration Options -# -# CONFIG_ARCH_CHIP_STM32F722RC is not set -# CONFIG_ARCH_CHIP_STM32F722RE is not set -# CONFIG_ARCH_CHIP_STM32F722VC is not set -# CONFIG_ARCH_CHIP_STM32F722VE is not set -# CONFIG_ARCH_CHIP_STM32F722ZC is not set -# CONFIG_ARCH_CHIP_STM32F722ZE is not set -# CONFIG_ARCH_CHIP_STM32F722IC is not set -# CONFIG_ARCH_CHIP_STM32F722IE is not set -# CONFIG_ARCH_CHIP_STM32F723RC is not set -# CONFIG_ARCH_CHIP_STM32F723RE is not set -# CONFIG_ARCH_CHIP_STM32F723VC is not set -# CONFIG_ARCH_CHIP_STM32F723VE is not set -# CONFIG_ARCH_CHIP_STM32F723ZC is not set -# CONFIG_ARCH_CHIP_STM32F723ZE is not set -# CONFIG_ARCH_CHIP_STM32F723IC is not set -# CONFIG_ARCH_CHIP_STM32F723IE is not set -# CONFIG_ARCH_CHIP_STM32F745VG is not set -# CONFIG_ARCH_CHIP_STM32F745VE is not set -# CONFIG_ARCH_CHIP_STM32F745IG is not set -# CONFIG_ARCH_CHIP_STM32F745IE is not set -# CONFIG_ARCH_CHIP_STM32F745ZE is not set -# CONFIG_ARCH_CHIP_STM32F745ZG is not set -# CONFIG_ARCH_CHIP_STM32F746BG is not set -# CONFIG_ARCH_CHIP_STM32F746VG is not set -# CONFIG_ARCH_CHIP_STM32F746VE is not set -# CONFIG_ARCH_CHIP_STM32F746BE is not set -# CONFIG_ARCH_CHIP_STM32F746ZG is not set -# CONFIG_ARCH_CHIP_STM32F746IE is not set -# CONFIG_ARCH_CHIP_STM32F746NG is not set -# CONFIG_ARCH_CHIP_STM32F746NE is not set -# CONFIG_ARCH_CHIP_STM32F746ZE is not set -# CONFIG_ARCH_CHIP_STM32F746IG is not set -# CONFIG_ARCH_CHIP_STM32F756NG is not set -# CONFIG_ARCH_CHIP_STM32F756BG is not set -# CONFIG_ARCH_CHIP_STM32F756IG is not set -# CONFIG_ARCH_CHIP_STM32F756VG is not set -# CONFIG_ARCH_CHIP_STM32F756ZG is not set -# CONFIG_ARCH_CHIP_STM32F765NI is not set -# CONFIG_ARCH_CHIP_STM32F765VI is not set -# CONFIG_ARCH_CHIP_STM32F765VG is not set -# CONFIG_ARCH_CHIP_STM32F765BI is not set -# CONFIG_ARCH_CHIP_STM32F765NG is not set -# CONFIG_ARCH_CHIP_STM32F765ZG is not set -# CONFIG_ARCH_CHIP_STM32F765ZI is not set -# CONFIG_ARCH_CHIP_STM32F765IG is not set -# CONFIG_ARCH_CHIP_STM32F765BG is not set -# CONFIG_ARCH_CHIP_STM32F765II is not set -# CONFIG_ARCH_CHIP_STM32F767NG is not set -# CONFIG_ARCH_CHIP_STM32F767IG is not set -# CONFIG_ARCH_CHIP_STM32F767VG is not set -# CONFIG_ARCH_CHIP_STM32F767ZG is not set -# CONFIG_ARCH_CHIP_STM32F767NI is not set -# CONFIG_ARCH_CHIP_STM32F767VI is not set -# CONFIG_ARCH_CHIP_STM32F767BG is not set -CONFIG_ARCH_CHIP_STM32F767ZI=y -# CONFIG_ARCH_CHIP_STM32F767II is not set -# CONFIG_ARCH_CHIP_STM32F769BI is not set -# CONFIG_ARCH_CHIP_STM32F769II is not set -# CONFIG_ARCH_CHIP_STM32F769BG is not set -# CONFIG_ARCH_CHIP_STM32F769NI is not set -# CONFIG_ARCH_CHIP_STM32F769AI is not set -# CONFIG_ARCH_CHIP_STM32F769NG is not set -# CONFIG_ARCH_CHIP_STM32F769IG is not set -# CONFIG_ARCH_CHIP_STM32F777ZI is not set -# CONFIG_ARCH_CHIP_STM32F777VI is not set -# CONFIG_ARCH_CHIP_STM32F777NI is not set -# CONFIG_ARCH_CHIP_STM32F777BI is not set -# CONFIG_ARCH_CHIP_STM32F777II is not set -# CONFIG_ARCH_CHIP_STM32F778AI is not set -# CONFIG_ARCH_CHIP_STM32F779II is not set -# CONFIG_ARCH_CHIP_STM32F779NI is not set -# CONFIG_ARCH_CHIP_STM32F779BI is not set -# CONFIG_ARCH_CHIP_STM32F779AI is not set -# CONFIG_STM32F7_STM32F72XX is not set -# CONFIG_STM32F7_STM32F73XX is not set -# CONFIG_STM32F7_STM32F74XX is not set -# CONFIG_STM32F7_STM32F75XX is not set -CONFIG_STM32F7_STM32F76XX=y -# CONFIG_STM32F7_STM32F77XX is not set -# CONFIG_STM32F7_IO_CONFIG_R is not set -# CONFIG_STM32F7_IO_CONFIG_V is not set -# CONFIG_STM32F7_IO_CONFIG_I is not set -CONFIG_STM32F7_IO_CONFIG_Z=y -# CONFIG_STM32F7_IO_CONFIG_N is not set -# CONFIG_STM32F7_IO_CONFIG_B is not set -# CONFIG_STM32F7_IO_CONFIG_A is not set -# CONFIG_STM32F7_STM32F722XX is not set -# CONFIG_STM32F7_STM32F723XX is not set -# CONFIG_STM32F7_STM32F745XX is not set -# CONFIG_STM32F7_STM32F746XX is not set -# CONFIG_STM32F7_STM32F756XX is not set -# CONFIG_STM32F7_STM32F765XX is not set -CONFIG_STM32F7_STM32F767XX=y -# CONFIG_STM32F7_STM32F768XX is not set -# CONFIG_STM32F7_STM32F768AX is not set -# CONFIG_STM32F7_STM32F769XX is not set -# CONFIG_STM32F7_STM32F769AX is not set -# CONFIG_STM32F7_STM32F777XX is not set -# CONFIG_STM32F7_STM32F778XX is not set -# CONFIG_STM32F7_STM32F778AX is not set -# CONFIG_STM32F7_STM32F779XX is not set -# CONFIG_STM32F7_STM32F779AX is not set -# CONFIG_STM32F7_FLASH_CONFIG_E is not set -# CONFIG_STM32F7_FLASH_CONFIG_G is not set -CONFIG_STM32F7_FLASH_CONFIG_I=y -CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y -# CONFIG_STM32F7_FLASH_OVERRIDE_C is not set -# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set -# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set -# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set -# CONFIG_STM32F7_FLASH_ART_ACCELERATOR is not set - -# -# STM32 Peripheral Support -# -CONFIG_STM32F7_HAVE_LTDC=y -CONFIG_STM32F7_HAVE_FMC=y -CONFIG_STM32F7_HAVE_ETHRNET=y -CONFIG_STM32F7_HAVE_RNG=y -CONFIG_STM32F7_HAVE_SPI4=y -CONFIG_STM32F7_HAVE_SPI5=y -CONFIG_STM32F7_HAVE_SPI6=y -CONFIG_STM32F7_HAVE_SDMMC2=y -CONFIG_STM32F7_HAVE_ADC1_DMA=y -# CONFIG_STM32F7_HAVE_ADC2_DMA is not set -# CONFIG_STM32F7_HAVE_ADC3_DMA is not set -CONFIG_STM32F7_HAVE_CAN2=y -CONFIG_STM32F7_HAVE_CAN3=y -CONFIG_STM32F7_HAVE_DCMI=y -# CONFIG_STM32F7_HAVE_DSIHOST is not set -CONFIG_STM32F7_HAVE_DMA2D=y -CONFIG_STM32F7_HAVE_JPEG=y -# CONFIG_STM32F7_HAVE_CRYP is not set -# CONFIG_STM32F7_HAVE_HASH is not set -CONFIG_STM32F7_HAVE_DFSDM1=y -CONFIG_STM32F7_ADC=y -# CONFIG_STM32F7_CAN is not set -# CONFIG_STM32F7_DAC is not set -CONFIG_STM32F7_DMA=y -CONFIG_STM32F7_I2C=y -# CONFIG_STM32F7_SAI is not set -CONFIG_STM32F7_SDMMC=y -CONFIG_STM32F7_SPI=y -CONFIG_STM32F7_TIM=y -CONFIG_STM32F7_USART=y -CONFIG_STM32F7_ADC1=y -# CONFIG_STM32F7_ADC2 is not set -# CONFIG_STM32F7_ADC3 is not set -CONFIG_STM32F7_BKPSRAM=y -# CONFIG_STM32F7_CAN1 is not set -# CONFIG_STM32F7_CAN2 is not set -# CONFIG_STM32F7_CAN3 is not set -# CONFIG_STM32F7_CEC is not set -# CONFIG_STM32F7_CRC is not set -# CONFIG_STM32F7_DFSDM1 is not set -CONFIG_STM32F7_DMA1=y -CONFIG_STM32F7_DMA2=y -# CONFIG_STM32F7_DAC1 is not set -# CONFIG_STM32F7_DAC2 is not set -# CONFIG_STM32F7_DCMI is not set -# CONFIG_STM32F7_DMA2D is not set -# CONFIG_STM32F7_JPEG is not set -# CONFIG_STM32F7_ETHMAC is not set -# CONFIG_STM32F7_FMC is not set -CONFIG_STM32F7_I2C1=y -# CONFIG_STM32F7_I2C2 is not set -# CONFIG_STM32F7_I2C3 is not set -CONFIG_STM32F7_I2C4=y -# CONFIG_STM32F7_LPTIM1 is not set -# CONFIG_STM32F7_LTDC is not set -CONFIG_STM32F7_OTGFS=y -# CONFIG_STM32F7_OTGHS is not set -# CONFIG_STM32F7_QUADSPI is not set -CONFIG_STM32F7_RTC=y -CONFIG_STM32F7_PWR=y -# CONFIG_STM32F7_RNG is not set -# CONFIG_STM32F7_SAI1 is not set -# CONFIG_STM32F7_SAI2 is not set -CONFIG_STM32F7_SDMMC1=y -# CONFIG_STM32F7_SDMMC2 is not set -# CONFIG_STM32F7_SPDIFRX is not set -CONFIG_STM32F7_SPI1=y -# CONFIG_STM32F7_SPI2 is not set -# CONFIG_STM32F7_SPI3 is not set -CONFIG_STM32F7_SPI4=y -CONFIG_STM32F7_SPI5=y -CONFIG_STM32F7_SPI6=y -CONFIG_STM32F7_TIM1=y -# CONFIG_STM32F7_TIM2 is not set -CONFIG_STM32F7_TIM3=y -CONFIG_STM32F7_TIM4=y -# CONFIG_STM32F7_TIM5 is not set -# CONFIG_STM32F7_TIM6 is not set -# CONFIG_STM32F7_TIM7 is not set -# CONFIG_STM32F7_TIM8 is not set -CONFIG_STM32F7_TIM9=y -CONFIG_STM32F7_TIM10=y -CONFIG_STM32F7_TIM11=y -# CONFIG_STM32F7_TIM12 is not set -# CONFIG_STM32F7_TIM13 is not set -# CONFIG_STM32F7_TIM14 is not set -CONFIG_STM32F7_USART1=y -CONFIG_STM32F7_USART2=y -CONFIG_STM32F7_USART3=y -# CONFIG_STM32F7_UART4 is not set -# CONFIG_STM32F7_UART5 is not set -CONFIG_STM32F7_USART6=y -CONFIG_STM32F7_UART7=y -CONFIG_STM32F7_UART8=y -# CONFIG_STM32F7_IWDG is not set -CONFIG_STM32F7_WWDG=y -# CONFIG_STM32F7_SYSCFG_IOCOMPENSATION is not set - -# -# U[S]ART Configuration -# -CONFIG_STM32F7_SERIAL_RXDMA_BUFFER_SIZE=32 -CONFIG_STM32F7_SERIAL_DISABLE_REORDERING=y -CONFIG_STM32F7_FLOWCONTROL_BROKEN=y -CONFIG_STM32F7_USART_BREAKS=y -CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y -CONFIG_STM32F7_USART_SINGLEWIRE=y - -# -# SPI Configuration -# -# CONFIG_STM32F7_SPI_INTERRUPTS is not set -# CONFIG_STM32F7_SPI_DMA is not set - -# -# I2C Configuration -# -CONFIG_STM32F7_I2C_DYNTIMEO=y -CONFIG_STM32F7_I2C_DYNTIMEO_USECPERBYTE=500 -CONFIG_STM32F7_I2C_DYNTIMEO_STARTSTOP=10 -CONFIG_STM32F7_I2CTIMEOSEC=0 - -# -# SD/MMC Configuration -# -CONFIG_STM32F7_SDMMC_DMA=y - -# -# SDMMC1 Configuration -# -CONFIG_STM32F7_SDMMC1_DMAPRIO=0x00010000 -# CONFIG_SDMMC1_WIDTH_D1_ONLY is not set -CONFIG_SDMMC1_SDIO_MODE=y -# CONFIG_SDMMC1_SDIO_PULLUP is not set -CONFIG_STM32F7_BBSRAM=y -CONFIG_STM32F7_BBSRAM_FILES=5 -CONFIG_STM32F7_SAVE_CRASHDUMP=y -CONFIG_STM32F7_HAVE_RTC_SUBSECONDS=y - -# -# RTC Configuration -# -CONFIG_STM32F7_RTC_MAGIC_REG=1 -CONFIG_STM32F7_RTC_MAGIC=0xfacefeed -CONFIG_STM32F7_RTC_MAGIC_TIME_SET=0xf00dface -CONFIG_STM32F7_RTC_HSECLOCK=y -# CONFIG_STM32F7_RTC_LSECLOCK is not set -# CONFIG_STM32F7_RTC_LSICLOCK is not set -# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set -# CONFIG_STM32F7_DTCMEXCLUDE is not set -# CONFIG_STM32F7_DTCM_PROCFS is not set -CONFIG_STM32F7_DMACAPABLE=y - -# -# Timer Configuration -# -# CONFIG_STM32F7_TIM1_PWM is not set -# CONFIG_STM32F7_TIM3_PWM is not set -# CONFIG_STM32F7_TIM4_PWM is not set -# CONFIG_STM32F7_TIM9_PWM is not set -# CONFIG_STM32F7_TIM10_PWM is not set -# CONFIG_STM32F7_TIM11_PWM is not set -# CONFIG_STM32F7_TIM1_ADC is not set -# CONFIG_STM32F7_TIM3_ADC is not set -# CONFIG_STM32F7_TIM4_ADC is not set -# CONFIG_STM32F7_TIM1_CAP is not set -# CONFIG_STM32F7_TIM3_CAP is not set -# CONFIG_STM32F7_TIM4_CAP is not set -# CONFIG_STM32F7_TIM9_CAP is not set -# CONFIG_STM32F7_TIM10_CAP is not set -# CONFIG_STM32F7_TIM11_CAP is not set - -# -# ADC Configuration -# -# CONFIG_STM32F7_ADC_NO_STARTUP_CONV is not set -# CONFIG_STM32F7_ADC1_DMA is not set -# CONFIG_ARCH_TOOLCHAIN_IAR is not set -CONFIG_ARCH_TOOLCHAIN_GNU=y -# CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS is not set - -# -# Architecture Options -# -# CONFIG_ARCH_NOINTC is not set -# CONFIG_ARCH_VECNOTIRQ is not set -CONFIG_ARCH_HAVE_IRQTRIGGER=y -CONFIG_ARCH_DMA=y -CONFIG_ARCH_HAVE_IRQPRIO=y -# CONFIG_ARCH_L2CACHE is not set -# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set -# CONFIG_ARCH_HAVE_ADDRENV is not set -# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set -# CONFIG_ARCH_HAVE_MULTICPU is not set -CONFIG_ARCH_HAVE_VFORK=y -# CONFIG_ARCH_HAVE_MMU is not set -CONFIG_ARCH_HAVE_MPU=y -# CONFIG_ARCH_NAND_HWECC is not set -# CONFIG_ARCH_HAVE_EXTCLK is not set -# CONFIG_ARCH_HAVE_POWEROFF is not set -CONFIG_ARCH_HAVE_PROGMEM=y -CONFIG_ARCH_HAVE_RESET=y -CONFIG_ARCH_HAVE_FETCHADD=y -CONFIG_ARCH_HAVE_RTC_SUBSECONDS=y -# CONFIG_ARCH_HAVE_GARBAGE is not set -# CONFIG_ARCH_GLOBAL_IRQDISABLE is not set -# CONFIG_ARCH_USE_MPU is not set -# CONFIG_ARCH_IRQPRIO is not set -CONFIG_ARCH_STACKDUMP=y -# CONFIG_ENDIAN_BIG is not set -# CONFIG_ARCH_IDLE_CUSTOM is not set -# CONFIG_ARCH_HAVE_RAMFUNCS is not set -CONFIG_ARCH_HAVE_RAMVECTORS=y -# CONFIG_ARCH_RAMVECTORS is not set -# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set - -# -# Board Settings -# -CONFIG_BOARD_LOOPSPERMSEC=22114 - -# -# Interrupt options -# -CONFIG_ARCH_HAVE_INTERRUPTSTACK=y -CONFIG_ARCH_INTERRUPTSTACK=750 -CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y -# CONFIG_ARCH_HIPRI_INTERRUPT is not set - -# -# Boot options -# -# CONFIG_BOOT_RUNFROMEXTSRAM is not set -CONFIG_BOOT_RUNFROMFLASH=y -# CONFIG_BOOT_RUNFROMISRAM is not set -# CONFIG_BOOT_RUNFROMSDRAM is not set -# CONFIG_BOOT_COPYTORAM is not set - -# -# Boot Memory Configuration -# -CONFIG_RAM_START=0x20010000 -CONFIG_RAM_SIZE=245760 -# CONFIG_ARCH_HAVE_SDRAM is not set - -# -# Board Selection -# -# CONFIG_ARCH_BOARD_NUCLEO_144 is not set -CONFIG_ARCH_BOARD_CUSTOM=y - -# -# Custom Board Configuration -# -CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" -CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" -CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y -CONFIG_BOARD_CUSTOM_LEDS=y -# CONFIG_BOARD_CUSTOM_BUTTONS is not set - -# -# Common Board Options -# -CONFIG_ARCH_HAVE_LEDS=y -CONFIG_ARCH_LEDS=y - -# -# Board-Specific Options -# -CONFIG_BOARD_CRASHDUMP=y -CONFIG_LIB_BOARDCTL=y -# CONFIG_BOARDCTL_FINALINIT is not set -CONFIG_BOARDCTL_RESET=y -CONFIG_BOARD_RESET_ON_ASSERT=2 -CONFIG_BOARD_ASSERT_RESET_VALUE=0 -# CONFIG_BOARDCTL_UNIQUEID is not set -# CONFIG_BOARDCTL_APP_SYMTAB is not set -CONFIG_BOARDCTL_USBDEVCTRL=y -# CONFIG_BOARDCTL_IOCTL is not set - -# -# RTOS Features -# -# CONFIG_DISABLE_OS_API is not set - -# -# Clocks and Timers -# -CONFIG_USEC_PER_TICK=1000 -# CONFIG_SYSTEM_TIME64 is not set -CONFIG_CLOCK_MONOTONIC=y -# CONFIG_ARCH_HAVE_TIMEKEEPING is not set -# CONFIG_JULIAN_TIME is not set -CONFIG_START_YEAR=2018 -CONFIG_START_MONTH=11 -CONFIG_START_DAY=30 -CONFIG_MAX_WDOGPARMS=2 -CONFIG_PREALLOC_WDOGS=50 -CONFIG_WDOG_INTRESERVE=4 -CONFIG_PREALLOC_TIMERS=50 - -# -# Tasks and Scheduling -# -# CONFIG_SPINLOCK is not set -# CONFIG_IRQCHAIN is not set -# CONFIG_IRQCOUNT is not set -# CONFIG_INIT_NONE is not set -CONFIG_INIT_ENTRYPOINT=y -# CONFIG_INIT_FILEPATH is not set -CONFIG_USER_ENTRYPOINT="nsh_main" -CONFIG_USERMAIN_PRIORITY=100 -CONFIG_RR_INTERVAL=0 -# CONFIG_SCHED_SPORADIC is not set -CONFIG_TASK_NAME_SIZE=24 -CONFIG_MAX_TASKS=32 -# CONFIG_SCHED_HAVE_PARENT is not set -CONFIG_SCHED_WAITPID=y - -# -# Pthread Options -# -CONFIG_NPTHREAD_KEYS=4 -# CONFIG_PTHREAD_MUTEX_TYPES is not set -CONFIG_PTHREAD_MUTEX_ROBUST=y -# CONFIG_PTHREAD_MUTEX_UNSAFE is not set -# CONFIG_PTHREAD_MUTEX_BOTH is not set -# CONFIG_PTHREAD_CLEANUP is not set -# CONFIG_CANCELLATION_POINTS is not set - -# -# Performance Monitoring -# -CONFIG_SCHED_SUSPENDSCHEDULER=y -CONFIG_SCHED_RESUMESCHEDULER=y -# CONFIG_SCHED_IRQMONITOR is not set -# CONFIG_SCHED_CRITMONITOR is not set -# CONFIG_SCHED_CPULOAD is not set -CONFIG_SCHED_INSTRUMENTATION=y -# CONFIG_SCHED_INSTRUMENTATION_PREEMPTION is not set -# CONFIG_SCHED_INSTRUMENTATION_CSECTION is not set -# CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS is not set -# CONFIG_SCHED_INSTRUMENTATION_BUFFER is not set - -# -# Files and I/O -# -CONFIG_DEV_CONSOLE=y -# CONFIG_FDCLONE_DISABLE is not set -CONFIG_FDCLONE_STDIO=y -CONFIG_SDCLONE_DISABLE=y -CONFIG_NFILE_DESCRIPTORS=54 -CONFIG_NFILE_STREAMS=8 -CONFIG_NAME_MAX=32 -CONFIG_PRIORITY_INHERITANCE=y -CONFIG_SEM_PREALLOCHOLDERS=0 -CONFIG_SEM_NNESTPRIO=8 - -# -# RTOS hooks -# -# CONFIG_BOARD_INITIALIZE is not set -# CONFIG_SCHED_STARTHOOK is not set -CONFIG_SCHED_ATEXIT=y -CONFIG_SCHED_ATEXIT_MAX=1 -# CONFIG_SCHED_ONEXIT is not set - -# -# Signal Configuration -# -# CONFIG_SIG_EVTHREAD is not set -CONFIG_SIG_DEFAULT=y - -# -# Per-signal Default Actions -# -CONFIG_SIG_SIGUSR1_ACTION=y -CONFIG_SIG_SIGUSR2_ACTION=y -CONFIG_SIG_SIGALRM_ACTION=y -CONFIG_SIG_SIGSTOP_ACTION=y -CONFIG_SIG_SIGKILL_ACTION=y - -# -# Signal Numbers -# - -# -# Standard Signal Numbers -# -CONFIG_SIG_SIGUSR1=1 -CONFIG_SIG_SIGUSR2=2 -CONFIG_SIG_SIGALRM=3 -CONFIG_SIG_STOP=6 -CONFIG_SIG_STP=7 -CONFIG_SIG_CONT=8 -CONFIG_SIG_KILL=9 -CONFIG_SIG_INT=10 - -# -# Non-standard Signal Numbers -# -CONFIG_SIG_SIGCONDTIMEDOUT=16 -CONFIG_SIG_SIGWORK=4 - -# -# POSIX Message Queue Options -# -CONFIG_PREALLOC_MQ_MSGS=4 -CONFIG_MQ_MAXMSGSIZE=32 -# CONFIG_MODULE is not set - -# -# Work queue support -# -CONFIG_SCHED_WORKQUEUE=y -CONFIG_SCHED_HPWORK=y -CONFIG_SCHED_HPNTHREADS=1 -CONFIG_SCHED_HPWORKPRIORITY=249 -CONFIG_SCHED_HPWORKSTACKSIZE=1800 -# CONFIG_WQUEUE_NOTIFIER is not set -CONFIG_SCHED_LPWORK=y -CONFIG_SCHED_LPNTHREADS=1 -CONFIG_SCHED_LPWORKPRIORITY=50 -CONFIG_SCHED_LPWORKPRIOMAX=176 -CONFIG_SCHED_LPWORKSTACKSIZE=1800 - -# -# Stack and heap information -# -CONFIG_IDLETHREAD_STACKSIZE=750 -CONFIG_USERMAIN_STACKSIZE=2500 -CONFIG_PTHREAD_STACK_MIN=512 -CONFIG_PTHREAD_STACK_DEFAULT=2048 -# CONFIG_LIB_SYSCALL is not set - -# -# Device Drivers -# -# CONFIG_DISABLE_POLL is not set -CONFIG_DEV_NULL=y -# CONFIG_DEV_ZERO is not set -# CONFIG_DEV_URANDOM is not set -# CONFIG_DEV_LOOP is not set - -# -# Buffering -# -# CONFIG_DRVR_WRITEBUFFER is not set -# CONFIG_DRVR_READAHEAD is not set -# CONFIG_RAMDISK is not set -# CONFIG_CAN is not set -# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set -# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set -# CONFIG_PWM is not set -CONFIG_ARCH_HAVE_I2CRESET=y -CONFIG_I2C=y -# CONFIG_I2C_SLAVE is not set -# CONFIG_I2C_POLLED is not set -CONFIG_I2C_RESET=y -# CONFIG_I2C_TRACE is not set -# CONFIG_I2C_DRIVER is not set - -# -# I2C Multiplexer Support -# -# CONFIG_I2CMULTIPLEXER_PCA9540BDP is not set -# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set -# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set -CONFIG_ARCH_HAVE_SPI_BITORDER=y -CONFIG_SPI=y -# CONFIG_SPI_SLAVE is not set -CONFIG_SPI_EXCHANGE=y -# CONFIG_SPI_CMDDATA is not set -# CONFIG_SPI_CALLBACK is not set -# CONFIG_SPI_HWFEATURES is not set -# CONFIG_SPI_BITORDER is not set -# CONFIG_SPI_CS_DELAY_CONTROL is not set -# CONFIG_SPI_TRIGGER is not set -# CONFIG_SPI_DRIVER is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_I2S is not set - -# -# Timer Driver Support -# -# CONFIG_TIMER is not set -# CONFIG_ONESHOT is not set -CONFIG_RTC=y -CONFIG_RTC_DATETIME=y -# CONFIG_RTC_ALARM is not set -# CONFIG_RTC_DRIVER is not set -# CONFIG_RTC_EXTERNAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" -# CONFIG_TIMERS_CS2100CP is not set -# CONFIG_ANALOG is not set -# CONFIG_DRIVERS_AUDIO is not set -# CONFIG_FB_CMAP is not set -# CONFIG_FB_TRANSPARENCY is not set -# CONFIG_DRIVERS_VIDEO is not set -# CONFIG_BCH is not set -# CONFIG_INPUT is not set - -# -# IO Expander/GPIO Support -# -# CONFIG_IOEXPANDER is not set -# CONFIG_DEV_GPIO is not set - -# -# LCD Driver Support -# -# CONFIG_LCD is not set -# CONFIG_SLCD is not set - -# -# LED Support -# -# CONFIG_USERLED is not set -# CONFIG_LEDS_APA102 is not set -# CONFIG_LEDS_MAX7219 is not set -# CONFIG_RGBLED is not set -# CONFIG_PCA9635PW is not set -# CONFIG_NCP5623C is not set -CONFIG_ARCH_HAVE_SDIO=y -CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE=y -CONFIG_ARCH_HAVE_SDIO_PREFLIGHT=y -# CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not set -CONFIG_MMCSD=y -CONFIG_MMCSD_NSLOTS=1 -# CONFIG_MMCSD_READONLY is not set -CONFIG_MMCSD_MULTIBLOCK_DISABLE=y -# CONFIG_MMCSD_MMCSUPPORT is not set -# CONFIG_MMCSD_HAVE_CARDDETECT is not set -# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set -# CONFIG_MMCSD_SPI is not set -CONFIG_SDIO_DMA=y -CONFIG_MMCSD_SDIO=y -# CONFIG_SDIO_MUXBUS is not set -CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE=y -# CONFIG_SDIO_WIDTH_D1_ONLY is not set -CONFIG_SDIO_BLOCKSETUP=y -# CONFIG_MODEM is not set -CONFIG_MTD=y - -# -# MTD Configuration -# -CONFIG_MTD_PARTITION=y -# CONFIG_MTD_SECT512 is not set -# CONFIG_MTD_PARTITION_NAMES is not set -CONFIG_MTD_BYTE_WRITE=y -# CONFIG_MTD_PROGMEM is not set -# CONFIG_MTD_CONFIG is not set - -# -# MTD Device Drivers -# -# CONFIG_MTD_NAND is not set -# CONFIG_RAMMTD is not set -# CONFIG_FILEMTD is not set -# CONFIG_MTD_AT24XX is not set -# CONFIG_MTD_AT25 is not set -# CONFIG_MTD_AT45DB is not set -# CONFIG_MTD_IS25XP is not set -# CONFIG_MTD_M25P is not set -# CONFIG_MTD_MX25L is not set -# CONFIG_MTD_MX35 is not set -# CONFIG_MTD_S25FL1 is not set -# CONFIG_MTD_N25QXXX is not set -# CONFIG_MTD_MX25RXX is not set -# CONFIG_MTD_SMART is not set -CONFIG_MTD_RAMTRON=y -CONFIG_RAMTRON_WRITEWAIT=y -CONFIG_RAMTRON_SETSPEED=y -# CONFIG_RAMTRON_CHUNKING is not set -# CONFIG_MTD_SST25 is not set -# CONFIG_MTD_SST25XX is not set -# CONFIG_MTD_SST26 is not set -# CONFIG_MTD_SST39FV is not set -# CONFIG_MTD_W25 is not set -# CONFIG_MTD_GD25 is not set -# CONFIG_EEPROM is not set -CONFIG_PIPES=y -CONFIG_DEV_PIPE_MAXSIZE=1024 -CONFIG_DEV_PIPE_SIZE=70 -CONFIG_DEV_FIFO_SIZE=0 -# CONFIG_PM is not set -# CONFIG_DRIVERS_POWERLED is not set -# CONFIG_DRIVERS_SMPS is not set -# CONFIG_DRIVERS_MOTOR is not set -# CONFIG_POWER is not set -# CONFIG_SENSORS is not set -CONFIG_SERIAL=y -# CONFIG_DEV_LOWCONSOLE is not set -CONFIG_SERIAL_REMOVABLE=y -CONFIG_SERIAL_CONSOLE=y -# CONFIG_16550_UART is not set -# CONFIG_OTHER_UART_SERIALDRIVER is not set -CONFIG_MCU_SERIAL=y -CONFIG_STANDARD_SERIAL=y -CONFIG_SERIAL_NPOLLWAITERS=2 -CONFIG_SERIAL_IFLOWCONTROL=y -CONFIG_SERIAL_OFLOWCONTROL=y -# CONFIG_SERIAL_DMA is not set -CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y -CONFIG_SERIAL_IFLOWCONTROL_LOWER_WATERMARK=10 -CONFIG_SERIAL_IFLOWCONTROL_UPPER_WATERMARK=90 -CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y -CONFIG_SERIAL_TERMIOS=y -# CONFIG_TTY_SIGINT is not set -# CONFIG_TTY_SIGSTP is not set -# CONFIG_USART1_SERIAL_CONSOLE is not set -# CONFIG_USART2_SERIAL_CONSOLE is not set -# CONFIG_USART3_SERIAL_CONSOLE is not set -# CONFIG_USART6_SERIAL_CONSOLE is not set -# CONFIG_UART7_SERIAL_CONSOLE is not set -CONFIG_UART8_SERIAL_CONSOLE=y -# CONFIG_OTHER_SERIAL_CONSOLE is not set -# CONFIG_NO_SERIAL_CONSOLE is not set -# CONFIG_UART_SERIALDRIVER is not set -# CONFIG_UART0_SERIALDRIVER is not set -# CONFIG_UART1_SERIALDRIVER is not set -# CONFIG_UART2_SERIALDRIVER is not set -# CONFIG_UART3_SERIALDRIVER is not set -# CONFIG_UART4_SERIALDRIVER is not set -# CONFIG_UART5_SERIALDRIVER is not set -# CONFIG_UART6_SERIALDRIVER is not set -CONFIG_UART7_SERIALDRIVER=y -CONFIG_UART8_SERIALDRIVER=y - -# -# UART7 Configuration -# -CONFIG_UART7_RXBUFSIZE=300 -CONFIG_UART7_TXBUFSIZE=300 -CONFIG_UART7_BAUD=57600 -CONFIG_UART7_BITS=8 -CONFIG_UART7_PARITY=0 -CONFIG_UART7_2STOP=0 -# CONFIG_UART7_IFLOWCONTROL is not set -# CONFIG_UART7_OFLOWCONTROL is not set -# CONFIG_UART7_DMA is not set - -# -# UART8 Configuration -# -CONFIG_UART8_RXBUFSIZE=300 -CONFIG_UART8_TXBUFSIZE=300 -CONFIG_UART8_BAUD=57600 -CONFIG_UART8_BITS=8 -CONFIG_UART8_PARITY=0 -CONFIG_UART8_2STOP=0 -# CONFIG_UART8_IFLOWCONTROL is not set -# CONFIG_UART8_OFLOWCONTROL is not set -# CONFIG_UART8_DMA is not set -# CONFIG_LPUART_SERIALDRIVER is not set -# CONFIG_LPUART0_SERIALDRIVER is not set -# CONFIG_LPUART1_SERIALDRIVER is not set -# CONFIG_LPUART2_SERIALDRIVER is not set -# CONFIG_LPUART3_SERIALDRIVER is not set -# CONFIG_LPUART4_SERIALDRIVER is not set -# CONFIG_LPUART5_SERIALDRIVER is not set -# CONFIG_LPUART6_SERIALDRIVER is not set -# CONFIG_LPUART7_SERIALDRIVER is not set -# CONFIG_LPUART8_SERIALDRIVER is not set -# CONFIG_USART0_SERIALDRIVER is not set -CONFIG_USART1_SERIALDRIVER=y -CONFIG_USART2_SERIALDRIVER=y -CONFIG_USART3_SERIALDRIVER=y -# CONFIG_USART4_SERIALDRIVER is not set -# CONFIG_USART5_SERIALDRIVER is not set -CONFIG_USART6_SERIALDRIVER=y -# CONFIG_USART7_SERIALDRIVER is not set -# CONFIG_USART8_SERIALDRIVER is not set -# CONFIG_USART9_SERIALDRIVER is not set - -# -# USART1 Configuration -# -CONFIG_USART1_RXBUFSIZE=128 -CONFIG_USART1_TXBUFSIZE=32 -CONFIG_USART1_BAUD=115200 -CONFIG_USART1_BITS=8 -CONFIG_USART1_PARITY=0 -CONFIG_USART1_2STOP=0 -# CONFIG_USART1_IFLOWCONTROL is not set -# CONFIG_USART1_OFLOWCONTROL is not set -# CONFIG_USART1_DMA is not set - -# -# USART2 Configuration -# -CONFIG_USART2_RXBUFSIZE=600 -CONFIG_USART2_TXBUFSIZE=1100 -CONFIG_USART2_BAUD=57600 -CONFIG_USART2_BITS=8 -CONFIG_USART2_PARITY=0 -CONFIG_USART2_2STOP=0 -CONFIG_USART2_IFLOWCONTROL=y -CONFIG_USART2_OFLOWCONTROL=y -# CONFIG_USART2_DMA is not set - -# -# USART3 Configuration -# -CONFIG_USART3_RXBUFSIZE=300 -CONFIG_USART3_TXBUFSIZE=300 -CONFIG_USART3_BAUD=57600 -CONFIG_USART3_BITS=8 -CONFIG_USART3_PARITY=0 -CONFIG_USART3_2STOP=0 -CONFIG_USART3_IFLOWCONTROL=y -CONFIG_USART3_OFLOWCONTROL=y -# CONFIG_USART3_DMA is not set - -# -# USART6 Configuration -# -CONFIG_USART6_RXBUFSIZE=300 -CONFIG_USART6_TXBUFSIZE=300 -CONFIG_USART6_BAUD=57600 -CONFIG_USART6_BITS=8 -CONFIG_USART6_PARITY=0 -CONFIG_USART6_2STOP=0 -# CONFIG_USART6_IFLOWCONTROL is not set -# CONFIG_USART6_OFLOWCONTROL is not set -# CONFIG_USART6_DMA is not set -# CONFIG_SCI0_SERIALDRIVER is not set -# CONFIG_SCI1_SERIALDRIVER is not set -# CONFIG_PSEUDOTERM is not set -CONFIG_USBDEV=y - -# -# USB Device Controller Driver Options -# -# CONFIG_USBDEV_ISOCHRONOUS is not set -# CONFIG_USBDEV_DUALSPEED is not set -# CONFIG_USBDEV_SELFPOWERED is not set -CONFIG_USBDEV_BUSPOWERED=y -CONFIG_USBDEV_MAXPOWER=500 -# CONFIG_USBDEV_DMA is not set -# CONFIG_ARCH_USBDEV_STALLQUEUE is not set -# CONFIG_USBDEV_TRACE is not set - -# -# USB Device Class Driver Options -# -# CONFIG_USBDEV_COMPOSITE is not set -# CONFIG_PL2303 is not set -CONFIG_CDCACM=y -# CONFIG_CDCACM_CONSOLE is not set -# CONFIG_CDCACM_IFLOWCONTROL is not set -CONFIG_CDCACM_EP0MAXPACKET=64 -CONFIG_CDCACM_EPINTIN=1 -CONFIG_CDCACM_EPINTIN_FSSIZE=64 -CONFIG_CDCACM_EPINTIN_HSSIZE=64 -CONFIG_CDCACM_EPBULKOUT=3 -CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 -CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 -CONFIG_CDCACM_EPBULKIN=2 -CONFIG_CDCACM_EPBULKIN_FSSIZE=64 -CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NRDREQS=4 -CONFIG_CDCACM_NWRREQS=4 -CONFIG_CDCACM_BULKIN_REQLEN=96 -CONFIG_CDCACM_RXBUFSIZE=600 -CONFIG_CDCACM_TXBUFSIZE=12000 -CONFIG_CDCACM_VENDORID=0x26ac -CONFIG_CDCACM_PRODUCTID=0x0011 -CONFIG_CDCACM_VENDORSTR="3D Robotics" -CONFIG_CDCACM_PRODUCTSTR="PX4 FMU v5.x Nucleo" -# CONFIG_USBMSC is not set -# CONFIG_RNDIS is not set -# CONFIG_DFU is not set -# CONFIG_NET_CDCECM is not set -# CONFIG_USBHOST is not set -# CONFIG_USBMISC is not set -# CONFIG_HAVE_USBTRACE is not set -# CONFIG_DRIVERS_WIRELESS is not set -# CONFIG_DRIVERS_CONTACTLESS is not set -# CONFIG_1WIRE is not set - -# -# System Logging -# -# CONFIG_ARCH_SYSLOG is not set -CONFIG_SYSLOG_WRITE=y -# CONFIG_RAMLOG is not set -# CONFIG_SYSLOG_BUFFER is not set -# CONFIG_SYSLOG_INTBUFFER is not set -# CONFIG_SYSLOG_TIMESTAMP is not set -# CONFIG_SYSLOG_PREFIX is not set -CONFIG_SYSLOG_SERIAL_CONSOLE=y -# CONFIG_SYSLOG_CHAR is not set -CONFIG_SYSLOG_CONSOLE=y -# CONFIG_SYSLOG_NONE is not set -# CONFIG_SYSLOG_FILE is not set -# CONFIG_SYSLOG_CHARDEV is not set - -# -# Networking Support -# -# CONFIG_ARCH_HAVE_NET is not set -# CONFIG_ARCH_HAVE_PHY is not set -# CONFIG_NET_WRITE_BUFFERS is not set -# CONFIG_NET_READAHEAD is not set -# CONFIG_NET_MCASTGROUP is not set -# CONFIG_NET is not set - -# -# Crypto API -# -# CONFIG_CRYPTO is not set - -# -# File Systems -# - -# -# File system configuration -# -# CONFIG_DISABLE_MOUNTPOINT is not set -# CONFIG_FS_AUTOMOUNTER is not set -# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -# CONFIG_PSEUDOFS_SOFTLINKS is not set -CONFIG_FS_READABLE=y -CONFIG_FS_WRITABLE=y -# CONFIG_FS_AIO is not set -# CONFIG_FS_NAMED_SEMAPHORES is not set -CONFIG_FS_MQUEUE_MPATH="/var/mqueue" -# CONFIG_FS_RAMMAP is not set - -# -# Partition Table -# -# CONFIG_PTABLE_PARTITION is not set -CONFIG_FS_FAT=y -CONFIG_FAT_LCNAMES=y -CONFIG_FAT_LFN=y -CONFIG_FAT_MAXFNAME=32 -CONFIG_FAT_LFN_ALIAS_HASH=y -CONFIG_FAT_LFN_ALIAS_TRAILCHARS=0 -CONFIG_FS_FATTIME=y -# CONFIG_FAT_FORCE_INDIRECT is not set -CONFIG_FAT_DMAMEMORY=y -CONFIG_FAT_DIRECT_RETRY=y -# CONFIG_FS_NXFFS is not set -CONFIG_FS_ROMFS=y -CONFIG_FS_CROMFS=y -# CONFIG_FS_TMPFS is not set -# CONFIG_FS_SMARTFS is not set -CONFIG_FS_BINFS=y -CONFIG_FS_PROCFS=y -CONFIG_FS_PROCFS_REGISTER=y - -# -# Exclude individual procfs entries -# -# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set -CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y -CONFIG_FS_PROCFS_EXCLUDE_BLOCKS=y -CONFIG_FS_PROCFS_EXCLUDE_MOUNT=y -CONFIG_FS_PROCFS_EXCLUDE_USAGE=y -# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set -CONFIG_FS_PROCFS_EXCLUDE_VERSION=y -# CONFIG_FS_PROCFS_EXCLUDE_MEMINFO is not set -# CONFIG_FS_PROCFS_INCLUDE_PROGMEM is not set -CONFIG_FS_PROCFS_EXCLUDE_MOUNTS=y -CONFIG_FS_PROCFS_EXCLUDE_PARTITIONS=y -# CONFIG_FS_SPIFFS is not set -# CONFIG_FS_UNIONFS is not set -# CONFIG_FS_HOSTFS is not set - -# -# Graphics Support -# -# CONFIG_NX is not set -# CONFIG_NXFONTS is not set - -# -# Font Cache Pixel Depths -# -CONFIG_NXFONTS_DISABLE_1BPP=y -CONFIG_NXFONTS_DISABLE_2BPP=y -CONFIG_NXFONTS_DISABLE_4BPP=y -CONFIG_NXFONTS_DISABLE_8BPP=y -CONFIG_NXFONTS_DISABLE_16BPP=y -CONFIG_NXFONTS_DISABLE_24BPP=y -CONFIG_NXFONTS_DISABLE_32BPP=y -CONFIG_NXFONTS_PACKEDMSFIRST=y -# CONFIG_NXGLIB is not set - -# -# Memory Management -# -# CONFIG_MM_SMALL is not set -CONFIG_MM_REGIONS=3 -# CONFIG_ARCH_HAVE_HEAP2 is not set -CONFIG_GRAN=y -CONFIG_GRAN_INTR=y -# CONFIG_MM_FILL_ALLOCATIONS is not set - -# -# Common I/O Buffer Support -# -# CONFIG_MM_IOB is not set - -# -# Audio Support -# -# CONFIG_AUDIO is not set - -# -# Wireless Support -# -# CONFIG_WIRELESS is not set - -# -# Binary Loader -# -# CONFIG_BINFMT_DISABLE is not set -# CONFIG_BINFMT_LOADABLE is not set -# CONFIG_PIC is not set -# CONFIG_NXFLAT is not set -# CONFIG_ELF is not set -CONFIG_BUILTIN=y -# CONFIG_SYMTAB_ORDEREDBYNAME is not set - -# -# Library Routines -# - -# -# Standard C Library Options -# - -# -# Standard C I/O -# -# CONFIG_STDIO_DISABLE_BUFFERING is not set -CONFIG_STDIO_BUFFER_SIZE=32 -CONFIG_STDIO_LINEBUFFER=y -CONFIG_NUNGET_CHARS=2 -CONFIG_LIBC_FLOATINGPOINT=y -CONFIG_LIBC_LONG_LONG=y -# CONFIG_LIBC_SCANSET is not set -# CONFIG_EOL_IS_CR is not set -# CONFIG_EOL_IS_LF is not set -# CONFIG_EOL_IS_BOTH_CRLF is not set -CONFIG_EOL_IS_EITHER_CRLF=y - -# -# Architecture-Specific Support -# -CONFIG_ARCH_LOWPUTC=y -# CONFIG_ARCH_ROMGETC is not set -CONFIG_LIBC_ARCH_MEMCPY=y -# CONFIG_LIBC_ARCH_MEMCMP is not set -# CONFIG_LIBC_ARCH_MEMMOVE is not set -# CONFIG_LIBC_ARCH_MEMSET is not set -# CONFIG_LIBC_ARCH_STRCHR is not set -# CONFIG_LIBC_ARCH_STRCMP is not set -# CONFIG_LIBC_ARCH_STRCPY is not set -# CONFIG_LIBC_ARCH_STRNCPY is not set -# CONFIG_LIBC_ARCH_STRLEN is not set -# CONFIG_LIBC_ARCH_STRNLEN is not set -# CONFIG_LIBC_ARCH_ELF is not set -CONFIG_ARMV7M_MEMCPY=y - -# -# stdlib Options -# -CONFIG_LIB_RAND_ORDER=1 -CONFIG_LIB_HOMEDIR="/" -CONFIG_LIBC_TMPDIR="/tmp" -CONFIG_LIBC_MAX_TMPFILE=32 - -# -# Program Execution Options -# -# CONFIG_LIBC_EXECFUNCS is not set -CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 -CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 - -# -# errno Decode Support -# -CONFIG_LIBC_STRERROR=y -# CONFIG_LIBC_STRERROR_SHORT is not set -# CONFIG_LIBC_PERROR_STDOUT is not set - -# -# memcpy/memset Options -# -CONFIG_MEMSET_OPTSPEED=y -CONFIG_MEMSET_64BIT=y -# CONFIG_LIBC_DLLFCN is not set -# CONFIG_LIBC_MODLIB is not set -# CONFIG_LIBC_WCHAR is not set -# CONFIG_LIBC_LOCALE is not set -CONFIG_LIBC_LZF=y -CONFIG_LIBC_LZF_SMALL=y -# CONFIG_LIBC_LZF_FAST is not set -# CONFIG_LIBC_LZF_FASTEST is not set -CONFIG_LIBC_LZF_HLOG=13 -CONFIG_LIBC_LZF_ALIGN=y - -# -# Time/Time Zone Support -# -# CONFIG_LIBC_LOCALTIME is not set -CONFIG_TIME_EXTENDED=y -CONFIG_ARCH_HAVE_TLS=y - -# -# Thread Local Storage (TLS) -# -# CONFIG_TLS is not set - -# -# Network-Related Options -# -# CONFIG_LIBC_IPv4_ADDRCONV is not set -# CONFIG_LIBC_IPv6_ADDRCONV is not set -# CONFIG_LIBC_NETDB is not set - -# -# NETDB Support -# -# CONFIG_LIBC_GAISTRERROR is not set -# CONFIG_NETDB_HOSTFILE is not set -# CONFIG_LIBC_IOCTL_VARIADIC is not set -CONFIG_LIB_SENDFILE_BUFSIZE=512 - -# -# Non-standard Library Support -# -# CONFIG_LIB_CRC64_FAST is not set -# CONFIG_LIB_KBDCODEC is not set -# CONFIG_LIB_SLCDCODEC is not set -# CONFIG_LIB_ENVPATH is not set -# CONFIG_LIB_HEX2BIN is not set - -# -# Basic CXX Support -# -CONFIG_C99_BOOL8=y -CONFIG_HAVE_CXX=y -# CONFIG_CXX_NEWLONG is not set - -# -# LLVM C++ Library (libcxx) -# -# CONFIG_LIBCXX is not set - -# -# uClibc++ Standard C++ Library -# -# CONFIG_UCLIBCXX is not set -# CONFIG_LIBDSP is not set - -# -# Application Configuration -# - -# -# Built-In Applications -# -CONFIG_BUILTIN_PROXY_STACKSIZE=1024 - -# -# CAN Utilities -# - -# -# Examples -# -# CONFIG_EXAMPLES_ADXL372_TEST is not set -# CONFIG_EXAMPLES_APA102 is not set -# CONFIG_EXAMPLES_CALIB_UDELAY is not set -# CONFIG_EXAMPLES_CCTYPE is not set -# CONFIG_EXAMPLES_CHAT is not set -# CONFIG_EXAMPLES_CONFIGDATA is not set -# CONFIG_EXAMPLES_CPUHOG is not set -# CONFIG_EXAMPLES_CROMFS is not set -# CONFIG_EXAMPLES_CXXTEST is not set -# CONFIG_EXAMPLES_DHCPD is not set -# CONFIG_EXAMPLES_DHTXX is not set -# CONFIG_EXAMPLES_DSPTEST is not set -# CONFIG_EXAMPLES_FLOWC is not set -# CONFIG_EXAMPLES_FSTEST is not set -# CONFIG_EXAMPLES_FTPC is not set -# CONFIG_EXAMPLES_FTPD is not set -# CONFIG_EXAMPLES_GPS is not set -# CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_IGMP is not set -# CONFIG_EXAMPLES_INA219 is not set -# CONFIG_EXAMPLES_INA226 is not set -# CONFIG_EXAMPLES_JSON is not set -# CONFIG_EXAMPLES_LSM330SPI_TEST is not set -# CONFIG_EXAMPLES_LVGLDEMO is not set -# CONFIG_EXAMPLES_MAX31855 is not set -# CONFIG_EXAMPLES_MEDIA is not set -# CONFIG_EXAMPLES_MLX90614 is not set -# CONFIG_EXAMPLES_MM is not set -# CONFIG_EXAMPLES_MODBUS is not set -# CONFIG_EXAMPLES_MOUNT is not set -# CONFIG_EXAMPLES_MTDPART is not set -# CONFIG_EXAMPLES_NULL is not set -# CONFIG_EXAMPLES_NXDEMO is not set -# CONFIG_EXAMPLES_NXFFS is not set -# CONFIG_EXAMPLES_OBD2 is not set -# CONFIG_EXAMPLES_PCA9635 is not set -# CONFIG_EXAMPLES_PDCURSES is not set -# CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_POWERLED is not set -# CONFIG_EXAMPLES_POWERMONITOR is not set -# CONFIG_EXAMPLES_PPPD is not set -# CONFIG_EXAMPLES_RFID_READUID is not set -# CONFIG_EXAMPLES_RGBLED is not set -# CONFIG_EXAMPLES_ROMFS is not set -# CONFIG_EXAMPLES_SENDMAIL is not set -# CONFIG_EXAMPLES_SERIALBLASTER is not set -# CONFIG_EXAMPLES_SERIALRX is not set -# CONFIG_EXAMPLES_SERLOOP is not set -# CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART is not set -# CONFIG_EXAMPLES_SMART_TEST is not set -# CONFIG_EXAMPLES_SMP is not set -# CONFIG_EXAMPLES_SMPS is not set -# CONFIG_EXAMPLES_STAT is not set -# CONFIG_EXAMPLES_TCPECHO is not set -# CONFIG_EXAMPLES_THTTPD is not set -# CONFIG_EXAMPLES_TIFF is not set -# CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_UNIONFS is not set -# CONFIG_EXAMPLES_USBSERIAL is not set -# CONFIG_EXAMPLES_USERFS is not set -# CONFIG_EXAMPLES_WATCHDOG is not set -# CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_XBC_TEST is not set - -# -# File System Utilities -# -# CONFIG_FSUTILS_FLASH_ERASEALL is not set -# CONFIG_FSUTILS_INIFILE is not set -CONFIG_FSUTILS_MKFATFS=y -# CONFIG_FSUTILS_PASSWD is not set - -# -# GPS Utilities -# -# CONFIG_GPSUTILS_MINMEA_LIB is not set - -# -# Graphics Support -# -# CONFIG_GRAPHICS_FT80X is not set -# CONFIG_GRAPHICS_LVGL is not set - -# -# NxWidgets/NxWM -# - -# -# NxWidgets -# - -# -# NxWM -# - -# -# Unit Tests -# -# CONFIG_GRAPHICS_PDCURSES is not set -# CONFIG_TIFF is not set - -# -# Interpreters -# -# CONFIG_INTERPRETERS_BAS is not set -# CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_MINIBASIC is not set -# CONFIG_INTERPRETERS_PCODE is not set - -# -# FreeModBus -# -# CONFIG_MODBUS is not set - -# -# Network Utilities -# -# CONFIG_NETUTILS_CHAT is not set -# CONFIG_NETUTILS_CODECS is not set -# CONFIG_NETUTILS_ESP8266 is not set -# CONFIG_NETUTILS_FTPC is not set -# CONFIG_NETUTILS_JSON is not set -# CONFIG_NETUTILS_SMTP is not set -# CONFIG_NETUTILS_THTTPD is not set - -# -# NSH Library -# -CONFIG_NSH_LIBRARY=y -# CONFIG_NSH_MOTD is not set - -# -# Command Line Configuration -# -CONFIG_NSH_PROMPT_STRING="nsh> " -CONFIG_NSH_READLINE=y -# CONFIG_NSH_CLE is not set -CONFIG_NSH_LINELEN=128 -# CONFIG_NSH_DISABLE_SEMICOLON is not set -CONFIG_NSH_QUOTE=y -CONFIG_NSH_CMDPARMS=y -CONFIG_NSH_MAXARGUMENTS=12 -CONFIG_NSH_ARGCAT=y -CONFIG_NSH_NESTDEPTH=8 -# CONFIG_NSH_DISABLEBG is not set -CONFIG_NSH_BUILTIN_APPS=y - -# -# Disable Individual commands -# -CONFIG_NSH_DISABLE_BASENAME=y -# CONFIG_NSH_DISABLE_CAT is not set -# CONFIG_NSH_DISABLE_CD is not set -# CONFIG_NSH_DISABLE_CP is not set -CONFIG_NSH_DISABLE_CMP=y -# CONFIG_NSH_DISABLE_DATE is not set -CONFIG_NSH_DISABLE_DD=y -# CONFIG_NSH_DISABLE_DF is not set -CONFIG_NSH_DISABLE_DIRNAME=y -# CONFIG_NSH_DISABLE_ECHO is not set -# CONFIG_NSH_DISABLE_ENV is not set -# CONFIG_NSH_DISABLE_EXEC is not set -# CONFIG_NSH_DISABLE_EXIT is not set -# CONFIG_NSH_DISABLE_EXPORT is not set -# CONFIG_NSH_DISABLE_FREE is not set -# CONFIG_NSH_DISABLE_GET is not set -# CONFIG_NSH_DISABLE_HELP is not set -CONFIG_NSH_DISABLE_HEXDUMP=y -CONFIG_NSH_DISABLE_IFCONFIG=y -CONFIG_NSH_DISABLE_IFUPDOWN=y -# CONFIG_NSH_DISABLE_KILL is not set -CONFIG_NSH_DISABLE_LOSETUP=y -CONFIG_NSH_DISABLE_LOSMART=y -# CONFIG_NSH_DISABLE_LS is not set -CONFIG_NSH_DISABLE_MB=y -# CONFIG_NSH_DISABLE_MKDIR is not set -CONFIG_NSH_DISABLE_MKFIFO=y -CONFIG_NSH_DISABLE_MKRD=y -CONFIG_NSH_DISABLE_MH=y -# CONFIG_NSH_DISABLE_MOUNT is not set -# CONFIG_NSH_DISABLE_MV is not set -# CONFIG_NSH_DISABLE_MW is not set -CONFIG_NSH_DISABLE_PRINTF=y -# CONFIG_NSH_DISABLE_PS is not set -CONFIG_NSH_DISABLE_PSSTACKUSAGE=y -CONFIG_NSH_DISABLE_PUT=y -# CONFIG_NSH_DISABLE_PWD is not set -CONFIG_NSH_DISABLE_REBOOT=y -# CONFIG_NSH_DISABLE_RM is not set -# CONFIG_NSH_DISABLE_RMDIR is not set -# CONFIG_NSH_DISABLE_SET is not set -# CONFIG_NSH_DISABLE_SH is not set -CONFIG_NSH_DISABLE_SHUTDOWN=y -# CONFIG_NSH_DISABLE_SLEEP is not set -# CONFIG_NSH_DISABLE_TIME is not set -# CONFIG_NSH_DISABLE_TEST is not set -CONFIG_NSH_DISABLE_TELNETD=y -CONFIG_NSH_DISABLE_TRUNCATE=y -# CONFIG_NSH_DISABLE_UMOUNT is not set -CONFIG_NSH_DISABLE_UNAME=y -# CONFIG_NSH_DISABLE_UNSET is not set -# CONFIG_NSH_DISABLE_USLEEP is not set -CONFIG_NSH_DISABLE_WGET=y -CONFIG_NSH_DISABLE_XD=y -CONFIG_NSH_MMCSDMINOR=0 -CONFIG_NSH_MMCSDSLOTNO=0 - -# -# Configure Command Options -# -CONFIG_NSH_VARS=y -CONFIG_NSH_CODECS_BUFSIZE=128 -CONFIG_NSH_PROC_MOUNTPOINT="/proc" -CONFIG_NSH_FILEIOSIZE=512 -CONFIG_NSH_STRERROR=y - -# -# Scripting Support -# -# CONFIG_NSH_DISABLESCRIPT is not set -# CONFIG_NSH_DISABLE_ITEF is not set -# CONFIG_NSH_DISABLE_LOOPS is not set -CONFIG_NSH_ROMFSETC=y -CONFIG_NSH_CROMFSETC=y -# CONFIG_NSH_ROMFSRC is not set -CONFIG_NSH_ROMFSMOUNTPT="/etc" -CONFIG_NSH_INITSCRIPT="init.d/rcS" -CONFIG_NSH_ROMFSDEVNO=0 -CONFIG_NSH_ROMFSSECTSIZE=128 -# CONFIG_NSH_DEFAULTROMFS is not set -CONFIG_NSH_ARCHROMFS=y -# CONFIG_NSH_CUSTOMROMFS is not set -CONFIG_NSH_FATDEVNO=1 -CONFIG_NSH_FATSECTSIZE=512 -CONFIG_NSH_FATNSECTORS=1024 -CONFIG_NSH_FATMOUNTPT="/tmp" - -# -# Console Configuration -# -CONFIG_NSH_CONSOLE=y -# CONFIG_NSH_USBCONSOLE is not set -# CONFIG_NSH_ALTCONDEV is not set -CONFIG_NSH_ARCHINIT=y -# CONFIG_NSH_LOGIN is not set -# CONFIG_NSH_CONSOLE_LOGIN is not set - -# -# Platform-specific Support -# -# CONFIG_PLATFORM_CONFIGDATA is not set -CONFIG_HAVE_CXXINITIALIZE=y - -# -# System Libraries and NSH Add-Ons -# -CONFIG_SYSTEM_CDCACM=y -CONFIG_SYSTEM_CDCACM_DEVMINOR=0 -# CONFIG_SYSTEM_CLE is not set -# CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_EMBEDLOG is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set -# CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_HEXED is not set -# CONFIG_SYSTEM_I2CTOOL is not set -# CONFIG_SYSTEM_LZF is not set -CONFIG_SYSTEM_NSH=y -CONFIG_SYSTEM_NSH_PRIORITY=100 -CONFIG_SYSTEM_NSH_STACKSIZE=2048 -# CONFIG_SYSTEM_NSH_CXXINITIALIZE is not set -# CONFIG_SYSTEM_POPEN is not set -# CONFIG_SYSTEM_RAMTEST is not set -CONFIG_READLINE_HAVE_EXTMATCH=y -CONFIG_SYSTEM_READLINE=y -CONFIG_READLINE_ECHO=y -# CONFIG_READLINE_TABCOMPLETION is not set -# CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_SETLOGMASK is not set -# CONFIG_SYSTEM_STACKMONITOR is not set -# CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_SYSTEM is not set -# CONFIG_SYSTEM_TEE is not set -# CONFIG_SYSTEM_UBLOXMODEM is not set -# CONFIG_SYSTEM_VI is not set -# CONFIG_SYSTEM_ZMODEM is not set - -# -# Testing -# -# CONFIG_TESTING_OSTEST is not set -# CONFIG_TESTING_UNITY is not set - -# -# Wireless Libraries and NSH Add-Ons -# - -# -# Bluetooth applications -# -# CONFIG_BTSAK is not set - -# -# IEEE 802.15.4 applications -# -# CONFIG_IEEE802154_LIBMAC is not set -# CONFIG_IEEE802154_LIBUTILS is not set -# CONFIG_IEEE802154_I8SAK is not set diff --git a/boards/stm/nucleo-F767ZI/nuttx-config/scripts/ld.script b/boards/stm/nucleo-F767ZI/nuttx-config/scripts/ld.script deleted file mode 100644 index 6aa1ece3ea..0000000000 --- a/boards/stm/nucleo-F767ZI/nuttx-config/scripts/ld.script +++ /dev/null @@ -1,180 +0,0 @@ -/**************************************************************************** - * nuttx-configs/px4nucleoF767ZI-v1/scripts/script.ld - * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* The STM32F767ZIT6 has 2048 KiB of main FLASH memory. This FLASH memory - * can be accessed from either the AXIM interface at address 0x0800:0000 or - * from the ITCM interface at address 0x0020:0000. - * - * Additional information, including the option bytes, is available at at - * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). - * - * In the STM32F767ZIT6, two different boot spaces can be selected through - * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and - * BOOT_ADD1 option bytes: - * - * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. - * ST programmed value: Flash on ITCM at 0x0020:0000 - * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. - * ST programmed value: System bootloader at 0x0010:0000 - * - * NuttX does not modify these option byes. On the unmodified NUCLEO-144 - * board, the BOOT0 pin is at ground so by default, the STM32F767ZIT6 will - * boot from address 0x0020:0000 in ITCM FLASH. - * - * The STM32F767ZIT6 also has 512 KiB of data SRAM (in addition to ITCM SRAM). - * SRAM is split up into three blocks: - * - * 1) 128 KiB of DTCM SRM beginning at address 0x2000:0000 - * 2) 368 KiB of SRAM1 beginning at address 0x2002:0000 - * 3) 16 KiB of SRAM2 beginning at address 0x2007:c000 - * - * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 - * where the code expects to begin execution by jumping to the entry point in - * the 0x0800:0000 address range. - */ - -MEMORY -{ - itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K - flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K - dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K - sram1 (rwx) : ORIGIN = 0x20020000, LENGTH = 368K - sram2 (rwx) : ORIGIN = 0x2007c000, LENGTH = 16K -} - -OUTPUT_ARCH(arm) -EXTERN(_vectors) -ENTRY(_stext) - -/* - * Ensure that abort() is present in the final object. The exception handling - * code pulled in by libgcc.a requires it (and that code cannot be easily avoided). - */ -EXTERN(abort) -EXTERN(_bootdelay_signature) - -SECTIONS -{ - .text : { - _stext = ABSOLUTE(.); - *(.vectors) - . = ALIGN(32); - /* - This signature provides the bootloader with a way to delay booting - */ - _bootdelay_signature = ABSOLUTE(.); - FILL(0xffecc2925d7d05c5) - . += 8; - *(.text .text.*) - *(.fixup) - *(.gnu.warning) - *(.rodata .rodata.*) - *(.gnu.linkonce.t.*) - *(.glue_7) - *(.glue_7t) - *(.got) - *(.gcc_except_table) - *(.gnu.linkonce.r.*) - _etext = ABSOLUTE(.); - - /* - * This is a hack to make the newlib libm __errno() call - * use the NuttX get_errno_ptr() function. - */ - __errno = get_errno_ptr; - } > flash - - /* - * Init functions (static constructors and the like) - */ - .init_section : { - _sinit = ABSOLUTE(.); - KEEP(*(.init_array .init_array.*)) - _einit = ABSOLUTE(.); - } > flash - - /* - * Construction data for parameters. - */ - __param ALIGN(4): { - __param_start = ABSOLUTE(.); - KEEP(*(__param*)) - __param_end = ABSOLUTE(.); - } > flash - - .ARM.extab : { - *(.ARM.extab*) - } > flash - - __exidx_start = ABSOLUTE(.); - .ARM.exidx : { - *(.ARM.exidx*) - } > flash - __exidx_end = ABSOLUTE(.); - - _eronly = ABSOLUTE(.); - - .data : { - _sdata = ABSOLUTE(.); - *(.data .data.*) - *(.gnu.linkonce.d.*) - CONSTRUCTORS - _edata = ABSOLUTE(.); - } > sram1 AT > flash - - .bss : { - _sbss = ABSOLUTE(.); - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - _ebss = ABSOLUTE(.); - } > sram1 - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_info 0 : { *(.debug_info) } - .debug_line 0 : { *(.debug_line) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_aranges 0 : { *(.debug_aranges) } -} diff --git a/boards/stm/nucleo-F767ZI/src/CMakeLists.txt b/boards/stm/nucleo-F767ZI/src/CMakeLists.txt deleted file mode 100644 index ae672f0e5f..0000000000 --- a/boards/stm/nucleo-F767ZI/src/CMakeLists.txt +++ /dev/null @@ -1,50 +0,0 @@ -############################################################################ -# -# Copyright (c) 2016 PX4 Development Team. All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name PX4 nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. -# -############################################################################ - -px4_add_library(drivers_board - # stm32_can.c # WIP - init.c - led.c - sdio.c - spi.c - timer_config.c - usb.c -) - -target_link_libraries(drivers_board - PRIVATE - nuttx_arch # sdio - nuttx_drivers # sdio - drivers__led # drv_led_start - px4_layer - ) diff --git a/boards/stm/nucleo-F767ZI/src/board_config.h b/boards/stm/nucleo-F767ZI/src/board_config.h deleted file mode 100644 index 1f6d53dfb6..0000000000 --- a/boards/stm/nucleo-F767ZI/src/board_config.h +++ /dev/null @@ -1,400 +0,0 @@ -/**************************************************************************** - * - * Copyright (c) 2016 PX4 Development Team. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name PX4 nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/** - * @file board_config.h - * - * PX4NUCLEOF767ZI-v1 internal definitions - */ - -#pragma once - -/**************************************************************************************************** - * Included Files - ****************************************************************************************************/ - -#include -#include -#include - -__BEGIN_DECLS - -/* these headers are not C++ safe */ -#include -#include -#include - -/**************************************************************************************************** - * Definitions - ****************************************************************************************************/ -/* Configuration ************************************************************************************/ -//{GPIO_RSSI_IN, 0, 0}, - pio Analog used as PWM -//{0, GPIO_LED_SAFETY, 0}, pio replacement -//{GPIO_SAFETY_SWITCH_IN, 0, 0}, pio replacement -//{0, GPIO_PERIPH_3V3_EN, 0}, Owned by the 8266 driver -//{0, GPIO_SBUS_INV, 0}, https://github.com/PX4/Firmware/blob/master/src/modules/px4iofirmware/sbus.c -//{GPIO_8266_GPIO0, 0, 0}, Owned by the 8266 driver -//{0, GPIO_SPEKTRUM_PWR_EN, 0}, Owned Spektum driver input to auto pilot -//{0, GPIO_8266_PD, 0}, Owned by the 8266 driver -//{0, GPIO_8266_RST, 0}, Owned by the 8266 driver - -/* PX4FMU GPIOs ***********************************************************************************/ -/* LEDs */ -/* Port[CON-PIN] FMUv5 Delta */ -#define GPIO_LED1 /* PB14[CN12-28] DRDY2 */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN14) -#define GPIO_LED2 /* PB0[CN11-34] RSSI */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN0) -#define GPIO_LED3 /* PB7[CN11-21] GPS1_TX */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7) - -#define GPIO_LED_RED GPIO_LED1 -#define GPIO_LED_GREEN GPIO_LED2 -#define GPIO_LED_BLUE GPIO_LED3 - -#define BOARD_HAS_CONTROL_STATUS_LEDS 1 -#define BOARD_OVERLOAD_LED LED_RED -#define BOARD_ARMED_LED LED_BLUE -#define BOARD_ARMED_STATE_LED LED_GREEN - -/* Define the Chip Selects */ - -#define GPIO_SPI_CS_MPU9250 /* PF2[CN11-52] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTF|GPIO_PIN2) -#define GPIO_SPI_CS_HMC5983 /* PF3[CN12-58] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTF|GPIO_PIN3) -#define GPIO_SPI_CS_LIS3MDL /* PF4[CN12-38] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTF|GPIO_PIN4) - -#define GPIO_SPI_CS_FRAM /* PF5[CN12-36] */(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTF|GPIO_PIN5) - -#define GPIO_SPI_CS_MS5611 /* PF10[CN12-42] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTF|GPIO_PIN10) - -#define GPIO_SPI_CS_ICM_20608_G /* PF13[CN12-57] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTF|GPIO_PIN13) - - -/* Define the Ready interrupts */ - -#define GPIO_DRDY_MPU9250 /* PB4[CN12-27] */ (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN4) -#define GPIO_DRDY_HMC5983 /* PB15[CN12-26] */ (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN15) -#define GPIO_DRDY_ICM_20608_G /* PC5[CN12-6] */ (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN5) - -/* - * Define the ability to shut off off the sensor signals - * by changing the signals to inputs - */ - -#define _PIN_OFF(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|GPIO_PULLDOWN|GPIO_SPEED_2MHz)) - -#define GPIO_SPI_CS_OFF_MPU9250 _PIN_OFF(GPIO_SPI_CS_MPU9250) -#define GPIO_SPI_CS_OFF_HMC5983 _PIN_OFF(GPIO_SPI_CS_HMC5983) -#define GPIO_SPI_CS_OFF_LIS3MDL _PIN_OFF(GPIO_SPI_CS_LIS3MDL) -#define GPIO_SPI_CS_OFF_MS5611 _PIN_OFF(GPIO_SPI_CS_MS5611) -#define GPIO_SPI_CS_OFF_ICM_20608_G _PIN_OFF(GPIO_SPI_CS_ICM_20608_G) - -#define GPIO_DRDY_OFF_MPU9250 _PIN_OFF(GPIO_DRDY_MPU9250) -#define GPIO_DRDY_OFF_HMC5983 _PIN_OFF(GPIO_DRDY_HMC5983) -#define GPIO_DRDY_OFF_ICM_20608_G _PIN_OFF(GPIO_DRDY_ICM_20608_G) - - -/* SPI1 off */ -#define GPIO_SPI1_SCK_OFF _PIN_OFF(GPIO_SPI1_SCK) -#define GPIO_SPI1_MISO_OFF _PIN_OFF(GPIO_SPI1_MISO) -#define GPIO_SPI1_MOSI_OFF _PIN_OFF(GPIO_SPI1_MOSI) - -/* SENSORS are on SPI1 - * FRAM is on bus SPI4 - * MS5611 is on bus SPI6 - */ -#define PX4_SPI_BUS_SENSORS 1 -#define PX4_SPI_BUS_RAMTRON 4 -#define PX4_SPI_BUS_BARO 5 -#define PX4_SPI_BUS_ICM 6 - -#define PX4_SPIDEV_GYRO PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,0) -#define PX4_SPIDEV_ACCEL_MAG PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,1) -#define PX4_SPIDEV_MPU PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,2) -#define PX4_SPIDEV_HMC PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,3) -#define PX4_SPIDEV_LIS PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,4) -#define PX4_SPIDEV_BMI PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,5) -#define PX4_SPIDEV_BMA PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,6) - -#define PX4_SENSOR_BUS_CS_GPIO {0, 0, GPIO_SPI_CS_MPU9250, GPIO_SPI_CS_HMC5983, GPIO_SPI_CS_LIS3MDL, 0, 0} -#define PX4_SENSORS_BUS_FIRST_CS PX4_SPIDEV_GYRO -#define PX4_SENSORS_BUS_LAST_CS PX4_SPIDEV_BMA - -#define PX4_SPIDEV_FRAM PX4_MK_SPI_SEL(PX4_SPI_BUS_RAMTRON,0) -#define PX4_RAMTRON_BUS_CS_GPIO {GPIO_SPI_CS_FRAM} -#define PX4_RAMTRON_BUS_FIRST_CS PX4_SPIDEV_FRAM -#define PX4_RAMTRON_BUS_LAST_CS PX4_SPIDEV_FRAM - -#define PX4_SPIDEV_BARO PX4_MK_SPI_SEL(PX4_SPI_BUS_BARO,0) -#define PX4_BARO_BUS_CS_GPIO {GPIO_SPI_CS_MS5611} -#define PX4_BARO_BUS_FIRST_CS PX4_SPIDEV_BARO -#define PX4_BARO_BUS_LAST_CS PX4_SPIDEV_BARO - -#define PX4_SPIDEV_ICM PX4_MK_SPI_SEL(PX4_SPI_BUS_ICM,0) -#define PX4_ICM_BUS_CS_GPIO {GPIO_SPI_CS_ICM_20608_G} -#define PX4_ICM_BUS_FIRST_CS PX4_SPIDEV_ICM -#define PX4_ICM_BUS_LAST_CS PX4_SPIDEV_ICM - -/* I2C busses */ -#define PX4_I2C_BUS_EXPANSION 4 -#define PX4_I2C_BUS_LED PX4_I2C_BUS_EXPANSION - -/* - * ADC channels - * - * These are the channel numbers of the ADCs of the microcontroller that - * can be used by the Px4 Firmware in the adc driver - */ -#define ADC_CHANNELS (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) | \ - (1 << 8) | \ - (1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14) - -// ADC defines to be used in sensors.cpp to read from a particular channel -#define ADC_BATTERY_VOLTAGE_CHANNEL 0 -#define ADC_BATTERY_CURRENT_CHANNEL 1 -#define ADC_5V_RAIL_SENSE 10 -#define ADC_RC_RSSI_CHANNEL 14 - -/* User GPIOs - * - * GPIO0-5 are the PWM servo outputs. - */ -#define GPIO_GPIO0_INPUT /* PE14[CN12-51] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN14) -#define GPIO_GPIO1_INPUT /* PA10[CN12-33] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTA|GPIO_PIN10) -#define GPIO_GPIO2_INPUT /* PE11[CN12-56] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN11) -#define GPIO_GPIO3_INPUT /* PE9[CN12-52] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN9) -#define GPIO_GPIO4_INPUT /* PD13[CN12-41] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTD|GPIO_PIN13) -#define GPIO_GPIO5_INPUT /* PD14[CN12-46] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTD|GPIO_PIN14) - -#define GPIO_GPIO0_OUTPUT /* PE14[CN12-51] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14) -#define GPIO_GPIO1_OUTPUT /* PE13[CN12-55] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13) -#define GPIO_GPIO2_OUTPUT /* PE11[CN12-56] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11) -#define GPIO_GPIO3_OUTPUT /* PE9[CN12-52] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9) -#define GPIO_GPIO4_OUTPUT /* PD13[CN12-41] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13) -#define GPIO_GPIO5_OUTPUT /* PD14[CN12-46] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14) - -/* Power supply control and monitoring GPIOs */ -#define GPIO_VDD_BRICK_VALID /* PB10[CN12-25] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN10) -#define GPIO_VDD_3V3_SENSORS_EN /* PE3[CN11-47] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3) - -/* Tone alarm output */ -#define TONE_ALARM_TIMER 2 /* timer 2 */ -#define TONE_ALARM_CHANNEL /* PA5[CN12-11] TIM2_CH1 */ 1 /* channel 1 */ -#define GPIO_TONE_ALARM_IDLE /* PA5[CN12-11] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN5) -#define GPIO_TONE_ALARM /* PA5[CN12-11] */ (GPIO_ALT|GPIO_AF1|GPIO_SPEED_2MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5) - -/* PWM - * - * Six PWM outputs are configured. - * - * Pins: - * - * CH1 : PE14 : TIM1_CH4 - * CH2 : PE13 : TIM1_CH3 - * CH3 : PE11 : TIM1_CH2 - * CH4 : PE9 : TIM1_CH1 - * CH5 : PD13 : TIM4_CH2 - * CH6 : PD14 : TIM4_CH3 - */ -#define GPIO_TIM1_CH1OUT /* PE14[CN12-51] */ (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN9) -#define GPIO_TIM1_CH2OUT /* PE13[CN12-55] */ (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN11) -#define GPIO_TIM1_CH3OUT /* PE11[CN12-56] */ (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN13) -#define GPIO_TIM1_CH4OUT /* PE9[CN12-52] */ (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN14) -#define GPIO_TIM4_CH2OUT /* PD13[CN12-41] */ (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN13) -#define GPIO_TIM4_CH3OUT /* PD14[CN12-46] */ (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN14) -#define DIRECT_PWM_OUTPUT_CHANNELS 6 - -#define GPIO_TIM1_CH1IN /* PE14[CN12-51] */ GPIO_TIM1_CH1IN_2 -#define GPIO_TIM1_CH2IN /* PE13[CN12-55] */ GPIO_TIM1_CH2IN_2 -#define GPIO_TIM1_CH3IN /* PE11[CN12-56] */ GPIO_TIM1_CH3IN_2 -#define GPIO_TIM1_CH4IN /* PE9[CN12-52] */ GPIO_TIM1_CH4IN_2 -#define GPIO_TIM4_CH2IN /* PD13[CN12-41] */ GPIO_TIM4_CH2IN_2 -#define GPIO_TIM4_CH3IN /* PD14[CN12-46] */ GPIO_TIM4_CH3IN_2 -#define DIRECT_INPUT_TIMER_CHANNELS 6 - -/* USB OTG FS - * - * PA9 OTG_FS_VBUS VBUS sensing - */ -#define GPIO_OTGFS_VBUS /* PA9[CN12-21] */ (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9) - -/* High-resolution timer */ -#define HRT_TIMER 8 /* use timer8 for the HRT */ -#define HRT_TIMER_CHANNEL 3 /* use capture/compare channel 3 */ - -//todo:Needs to be moved to T14C1 -#define HRT_PPM_CHANNEL /* PA7[CN12-15] */ 1 /* use capture/compare channel 1 */ -#define GPIO_PPM_IN /* PB0[CN11-34] */ GPIO_TIM3_CH3IN_1 - -#define RC_SERIAL_PORT "/dev/ttyS4" - -/* PWM input driver. Use FMU AUX5 pins attached to timer4 channel 2 */ -#define PWMIN_TIMER 4 -#define PWMIN_TIMER_CHANNEL /* PD13[CN12-41] */ 2 -#define GPIO_PWM_IN /* PD13[CN12-41] */ GPIO_TIM4_CH2IN_2 - -#define GPIO_RSSI_IN /* PC4[CN12-34] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTC|GPIO_PIN4) -#define GPIO_LED_SAFETY /* PE12[CN12-49] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN12) -#define GPIO_BTN_SAFETY /* PE10[CN12-47] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN10) -#define GPIO_PERIPH_3V3_EN /* PG4[CN12-69] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTG|GPIO_PIN4) - -#define GPIO_SBUS_INV /* PD10[CN12-65] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN10) -#define BOARD_INVERT_RC_INPUT(_invert_true, _na) px4_arch_gpiowrite(GPIO_SBUS_INV, _invert_true); - -#define GPIO_8266_GPIO0 /* PD15[CN12-48] */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTD|GPIO_PIN15) -#define GPIO_SPEKTRUM_PWR_EN /* PE4[CN11-48] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN4) -#define GPIO_8266_PD /* PE7[CN12-44] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN7) -#define GPIO_8266_RST /* PG10[CN11-66] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTG|GPIO_PIN10) - -#define GPIO_VDD_5V_PERIPH_OC /* PE15[CN12-53] */ (GPIO_INPUT|GPIO_PULLDOWN|GPIO_PORTE|GPIO_PIN15) - -/* Power switch controls ******************************************************/ - -#define SPEKTRUM_POWER(_on_true) px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (!_on_true)) - -/* - * FMUv5 has a separate RC_IN - * - * N.B. px4nucleoF767ZI-v1 is Deprecated - for Reference only - * These interfaces can not be realized with this HW without - * more work. - * - * GPIO PPM_IN on PA7 T14C1 - * SPEKTRUM_RX (it's TX or RX in Bind) on UART6 PG9 (NOT FMUv5 test HW ONLY) - * Inversion is possible in the UART - * FMU can drive GPIO PPM_IN as an output - */ -#define GPIO_PPM_IN_AS_OUT /* PE5[CN11-50] */ (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5) -#define SPEKTRUM_RX_AS_GPIO_OUTPUT() px4_arch_configgpio(GPIO_PPM_IN_AS_OUT) -#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX) -#define SPEKTRUM_OUT(_one_true) px4_arch_gpiowrite(GPIO_PPM_IN_AS_OUT, (_one_true)) - - -#define SDIO_SLOTNO 0 /* Only one slot */ -#define SDIO_MINOR 0 - -/* SD card bringup does not work if performed on the IDLE thread because it - * will cause waiting. Use either: - * - * CONFIG_LIB_BOARDCTL=y, OR - * CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y - */ - -#if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_LIB_BOARDCTL) && \ - !defined(CONFIG_BOARD_INITTHREAD) -# warning SDIO initialization cannot be perfomed on the IDLE thread -#endif - -/* By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction) - * this board support the ADC system_power interface, and therefore - * provides the true logic GPIO BOARD_ADC_xxxx macros. - */ -#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS)) -#define BOARD_ADC_BRICK_VALID (px4_arch_gpioread(GPIO_VDD_BRICK_VALID)) -#define BOARD_ADC_SERVO_VALID (1) -#define BOARD_ADC_PERIPH_5V_OC (px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC)) -#define BOARD_ADC_HIPOWER_5V_OC (0) - -#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS - -/* This board provides a DMA pool and APIs */ - -#define BOARD_DMA_ALLOC_POOL_SIZE 5120 - -/**************************************************************************************************** - * Public Types - ****************************************************************************************************/ - -/**************************************************************************************************** - * Public data - ****************************************************************************************************/ - -#ifndef __ASSEMBLY__ - -/**************************************************************************************************** - * Public Functions - ****************************************************************************************************/ - -/**************************************************************************** - * Name: stm32_sdio_initialize - * - * Description: - * Initialize SDIO-based MMC/SD card support - * - ****************************************************************************/ - -int stm32_sdio_initialize(void); - -/**************************************************************************************************** - * Name: stm32_spiinitialize - * - * Description: - * Called to configure SPI chip select GPIO pins for the PX4FMU board. - * - ****************************************************************************************************/ - -extern void stm32_spiinitialize(void); - -/************************************************************************************ - * Name: stm32_spi_bus_initialize - * - * Description: - * Called to configure SPI Buses. - * - ************************************************************************************/ - -extern int stm32_spi_bus_initialize(void); - -/**************************************************************************************************** - * Name: board_spi_reset board_peripheral_reset - * - * Description: - * Called to reset SPI and the perferal bus - * - ****************************************************************************************************/ - -void board_spi_reset(int ms); -extern void board_peripheral_reset(int ms); - -/**************************************************************************************************** - * Name: stm32_usbinitialize - * - * Description: - * Called to configure USB IO. - * - ****************************************************************************************************/ - -extern void stm32_usbinitialize(void); - -#include - -#endif /* __ASSEMBLY__ */ - -__END_DECLS diff --git a/boards/stm/nucleo-F767ZI/src/can.c b/boards/stm/nucleo-F767ZI/src/can.c deleted file mode 100644 index 9b506fe17e..0000000000 --- a/boards/stm/nucleo-F767ZI/src/can.c +++ /dev/null @@ -1,129 +0,0 @@ -/**************************************************************************** - * - * Copyright (C) 2012 PX4 Development Team. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name PX4 nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/** - * @file px4nucleo_can.c - * - * Board-specific CAN functions. - */ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include -#include - -#include -#include - -#include "chip.h" -#include "up_arch.h" - -#include "chip.h" -#include "stm32_can.h" -#include "board_config.h" - -#ifdef CONFIG_CAN - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ -/* Configuration ********************************************************************/ - -#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) -# warning "Both CAN1 and CAN2 are enabled. Assuming only CAN1." -# undef CONFIG_STM32_CAN2 -#endif - -#ifdef CONFIG_STM32_CAN1 -# define CAN_PORT 1 -#else -# define CAN_PORT 2 -#endif - -/************************************************************************************ - * Private Functions - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: can_devinit - * - * Description: - * All STM32 architectures must provide the following interface to work with - * examples/can. - * - ************************************************************************************/ - -int can_devinit(void) -{ - static bool initialized = false; - struct can_dev_s *can; - int ret; - - /* Check if we have already initialized */ - - if (!initialized) { - /* Call stm32_caninitialize() to get an instance of the CAN interface */ - - can = stm32_caninitialize(CAN_PORT); - - if (can == NULL) { - canerr("ERROR: Failed to get CAN interface\n"); - return -ENODEV; - } - - /* Register the CAN driver at "/dev/can0" */ - - ret = can_register("/dev/can0", can); - - if (ret < 0) { - canerr("ERROR: can_register failed: %d\n", ret); - return ret; - } - - /* Now we are initialized */ - - initialized = true; - } - - return OK; -} - -#endif diff --git a/boards/stm/nucleo-F767ZI/src/init.c b/boards/stm/nucleo-F767ZI/src/init.c deleted file mode 100644 index 0650d7bd8d..0000000000 --- a/boards/stm/nucleo-F767ZI/src/init.c +++ /dev/null @@ -1,272 +0,0 @@ -/**************************************************************************** - * - * Copyright (c) 2012-2016 PX4 Development Team. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name PX4 nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/** - * @file px4nucleo_init.c - * - * PX4FMU-specific early startup code. This file implements the - * board_app_initialize() function that is called early by nsh during startup. - * - * Code here is run before the rcS script is invoked; it should start required - * subsystems and perform board-specific initialization. - */ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include "board_config.h" -#include - -#include - -#include -#include - -#include - -#include - -#include "up_internal.h" -/**************************************************************************** - * Pre-Processor Definitions - ****************************************************************************/ - -/* - * Ideally we'd be able to get these from up_internal.h, - * but since we want to be able to disable the NuttX use - * of leds for system indication at will and there is no - * separate switch, we need to build independent of the - * CONFIG_ARCH_LEDS configuration switch. - */ -__BEGIN_DECLS -extern void led_init(void); -extern void led_on(int led); -extern void led_off(int led); -__END_DECLS - -/**************************************************************************** - * Protected Functions - ****************************************************************************/ -/**************************************************************************** - * Public Functions - ****************************************************************************/ -/************************************************************************************ - * Name: board_peripheral_reset - * - * Description: - * - ************************************************************************************/ -__EXPORT void board_peripheral_reset(int ms) -{ - /* set the peripheral rails off */ - stm32_configgpio(GPIO_PERIPH_3V3_EN); - - stm32_gpiowrite(GPIO_PERIPH_3V3_EN, 0); - - bool last = stm32_gpioread(GPIO_SPEKTRUM_PWR_EN); - /* Keep Spektum on to discharge rail*/ - stm32_gpiowrite(GPIO_SPEKTRUM_PWR_EN, 1); - - /* wait for the peripheral rail to reach GND */ - usleep(ms * 1000); - syslog(LOG_DEBUG, "reset done, %d ms\n", ms); - - /* re-enable power */ - - /* switch the peripheral rail back on */ - stm32_gpiowrite(GPIO_SPEKTRUM_PWR_EN, last); - stm32_gpiowrite(GPIO_PERIPH_3V3_EN, 1); - -} - -/************************************************************************************ - * Name: stm32_boardinitialize - * - * Description: - * All STM32 architectures must provide the following entry point. This entry point - * is called early in the initialization -- after all memory has been configured - * and mapped but before any devices have been initialized. - * - ************************************************************************************/ - -__EXPORT void -stm32_boardinitialize(void) -{ - /* configure LEDs */ - - board_autoled_initialize(); - - /* configure ADC pins */ - stm32_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */ - stm32_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */ - stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */ - stm32_configgpio(GPIO_ADC1_IN11); /* RSSI analog in */ - - /* configure CAN interface */ -#if defined(GPIO_CAN1_RX) - stm32_configgpio(GPIO_CAN1_RX); - stm32_configgpio(GPIO_CAN1_TX); -#endif - stm32_configgpio(GPIO_CAN2_RX); - stm32_configgpio(GPIO_CAN2_TX); - stm32_configgpio(GPIO_CAN3_RX); - stm32_configgpio(GPIO_CAN3_TX); - - /* configure power supply control/sense pins */ - stm32_configgpio(GPIO_PERIPH_3V3_EN); - stm32_configgpio(GPIO_VDD_BRICK_VALID); - - stm32_configgpio(GPIO_SBUS_INV); - stm32_configgpio(GPIO_8266_GPIO0); - stm32_configgpio(GPIO_SPEKTRUM_PWR_EN); - stm32_configgpio(GPIO_8266_PD); - stm32_configgpio(GPIO_8266_RST); - stm32_configgpio(GPIO_BTN_SAFETY); - - /* configure the GPIO pins to outputs and keep them low */ - stm32_configgpio(GPIO_GPIO0_OUTPUT); - stm32_configgpio(GPIO_GPIO1_OUTPUT); - stm32_configgpio(GPIO_GPIO2_OUTPUT); - stm32_configgpio(GPIO_GPIO3_OUTPUT); - stm32_configgpio(GPIO_GPIO4_OUTPUT); - stm32_configgpio(GPIO_GPIO5_OUTPUT); - - /* configure SPI interfaces */ - stm32_spiinitialize(); - -} - -/**************************************************************************** - * Name: board_app_initialize - * - * Description: - * Perform application specific initialization. This function is never - * called directly from application code, but only indirectly via the - * (non-standard) boardctl() interface using the command BOARDIOC_INIT. - * - * Input Parameters: - * arg - The boardctl() argument is passed to the board_app_initialize() - * implementation without modification. The argument has no - * meaning to NuttX; the meaning of the argument is a contract - * between the board-specific initalization logic and the the - * matching application logic. The value cold be such things as a - * mode enumeration value, a set of DIP switch switch settings, a - * pointer to configuration data read from a file or serial FLASH, - * or whatever you would like to do with it. Every implementation - * should accept zero/NULL as a default configuration. - * - * Returned Value: - * Zero (OK) is returned on success; a negated errno value is returned on - * any failure to indicate the nature of the failure. - * - ****************************************************************************/ - - -__EXPORT int board_app_initialize(uintptr_t arg) -{ - px4_platform_init(); - - /* configure the DMA allocator */ - - if (board_dma_alloc_init() < 0) { - syslog(LOG_ERR, "DMA alloc FAILED\n"); - } - - /* set up the serial DMA polling */ - static struct hrt_call serial_dma_call; - struct timespec ts; - - /* - * Poll at 1ms intervals for received bytes that have not triggered - * a DMA event. - */ - ts.tv_sec = 0; - ts.tv_nsec = 1000000; - - hrt_call_every(&serial_dma_call, - ts_to_abstime(&ts), - ts_to_abstime(&ts), - (hrt_callout)stm32_serial_dma_poll, - NULL); - - /* initial LED state */ - drv_led_start(); - led_off(LED_RED); - led_off(LED_GREEN); - led_off(LED_BLUE); - - if (board_hardfault_init(2, true) != 0) { - led_on(LED_RED); - } - -#ifdef CONFIG_SPI - int ret = stm32_spi_bus_initialize(); - - if (ret != OK) { - led_on(LED_RED); - return ret; - } - -#endif - -#ifdef CONFIG_MMCSD - ret = stm32_sdio_initialize(); - - if (ret != OK) { - led_on(LED_RED); - return ret; - } - -#endif - - return OK; -} diff --git a/boards/stm/nucleo-F767ZI/src/led.c b/boards/stm/nucleo-F767ZI/src/led.c deleted file mode 100644 index d61cb1606c..0000000000 --- a/boards/stm/nucleo-F767ZI/src/led.c +++ /dev/null @@ -1,229 +0,0 @@ -/**************************************************************************** - * - * Copyright (c) 2013 PX4 Development Team. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name PX4 nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/** - * @file px4fmu2_led.c - * - * PX4FMU LED backend. - */ - -#include - -#include - -#include "chip.h" -#include "stm32_gpio.h" -#include "board_config.h" - -#include -#include - -/* - * Ideally we'd be able to get these from up_internal.h, - * but since we want to be able to disable the NuttX use - * of leds for system indication at will and there is no - * separate switch, we need to build independent of the - * CONFIG_ARCH_LEDS configuration switch. - */ -__BEGIN_DECLS -extern void led_init(void); -extern void led_on(int led); -extern void led_off(int led); -extern void led_toggle(int led); -__END_DECLS - -#ifdef CONFIG_ARCH_LEDS -static bool nuttx_owns_leds = true; -// B R S G -// 0 1 2 3 -static const uint8_t xlatpx4[] = {1, 2, 4, 0}; -# define xlat(p) xlatpx4[(p)] -static uint32_t g_ledmap[] = { - GPIO_LED_GREEN, // Indexed by BOARD_LED_GREEN - GPIO_LED_BLUE, // Indexed by BOARD_LED_BLUE - GPIO_LED_RED, // Indexed by BOARD_LED_RED - GPIO_LED_SAFETY, // Indexed by LED_SAFETY by xlatpx4 -}; - -#else - -# define xlat(p) -static uint32_t g_ledmap[] = { - GPIO_LED_BLUE, // Indexed by LED_BLUE - GPIO_LED_RED, // Indexed by LED_RED, LED_AMBER - GPIO_LED_SAFETY, // Indexed by LED_SAFETY - GPIO_LED_GREEN, // Indexed by LED_GREEN -}; - -#endif - -__EXPORT void led_init(void) -{ - /* Configure LED GPIOs for output */ - for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) { - stm32_configgpio(g_ledmap[l]); - } -} - -static void phy_set_led(int led, bool state) -{ - /* Drive High to switch on */ - - stm32_gpiowrite(g_ledmap[led], state); -} - -static bool phy_get_led(int led) -{ - - return stm32_gpioread(g_ledmap[led]); -} - -__EXPORT void led_on(int led) -{ - phy_set_led(xlat(led), true); -} - -__EXPORT void led_off(int led) -{ - phy_set_led(xlat(led), false); -} - -__EXPORT void led_toggle(int led) -{ - - phy_set_led(xlat(led), !phy_get_led(xlat(led))); -} - -#ifdef CONFIG_ARCH_LEDS -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: board_autoled_initialize - ****************************************************************************/ - -void board_autoled_initialize(void) -{ - led_init(); -} - -/**************************************************************************** - * Name: board_autoled_on - ****************************************************************************/ - -void board_autoled_on(int led) -{ - if (!nuttx_owns_leds) { - return; - } - - switch (led) { - default: - break; - - case LED_HEAPALLOCATE: - phy_set_led(BOARD_LED_BLUE, true); - break; - - case LED_IRQSENABLED: - phy_set_led(BOARD_LED_BLUE, false); - phy_set_led(BOARD_LED_GREEN, true); - break; - - case LED_STACKCREATED: - phy_set_led(BOARD_LED_GREEN, true); - phy_set_led(BOARD_LED_BLUE, true); - break; - - case LED_INIRQ: - phy_set_led(BOARD_LED_BLUE, true); - break; - - case LED_SIGNAL: - phy_set_led(BOARD_LED_GREEN, true); - break; - - case LED_ASSERTION: - phy_set_led(BOARD_LED_RED, true); - phy_set_led(BOARD_LED_BLUE, true); - break; - - case LED_PANIC: - phy_set_led(BOARD_LED_RED, true); - break; - - case LED_IDLE : /* IDLE */ - phy_set_led(BOARD_LED_RED, true); - break; - } -} - -/**************************************************************************** - * Name: board_autoled_off - ****************************************************************************/ - -void board_autoled_off(int led) -{ - if (!nuttx_owns_leds) { - return; - } - - switch (led) { - default: - break; - - case LED_SIGNAL: - phy_set_led(BOARD_LED_GREEN, false); - break; - - case LED_INIRQ: - phy_set_led(BOARD_LED_BLUE, false); - break; - - case LED_ASSERTION: - phy_set_led(BOARD_LED_RED, false); - phy_set_led(BOARD_LED_BLUE, false); - break; - - case LED_PANIC: - phy_set_led(BOARD_LED_RED, false); - break; - - case LED_IDLE : /* IDLE */ - phy_set_led(BOARD_LED_RED, false); - break; - } -} - -#endif /* CONFIG_ARCH_LEDS */ diff --git a/boards/stm/nucleo-F767ZI/src/sdio.c b/boards/stm/nucleo-F767ZI/src/sdio.c deleted file mode 100644 index c06e515e09..0000000000 --- a/boards/stm/nucleo-F767ZI/src/sdio.c +++ /dev/null @@ -1,176 +0,0 @@ -/**************************************************************************** - * - * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include -#include - -#include -#include - -#include "chip.h" -#include "board_config.h" -#include "stm32_gpio.h" -#include "stm32_sdmmc.h" - -#ifdef CONFIG_MMCSD - - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Card detections requires card support and a card detection GPIO */ - -#define HAVE_NCD 1 -#if !defined(GPIO_SDMMC1_NCD) -# undef HAVE_NCD -#endif - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static FAR struct sdio_dev_s *sdio_dev; -#ifdef HAVE_NCD -static bool g_sd_inserted = 0xff; /* Impossible value */ -#endif - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_ncd_interrupt - * - * Description: - * Card detect interrupt handler. - * - ****************************************************************************/ - -#ifdef HAVE_NCD -static int stm32_ncd_interrupt(int irq, FAR void *context) -{ - bool present; - - present = !stm32_gpioread(GPIO_SDMMC1_NCD); - - if (sdio_dev && present != g_sd_inserted) { - sdio_mediachange(sdio_dev, present); - g_sd_inserted = present; - } - - return OK; -} -#endif - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_sdio_initialize - * - * Description: - * Initialize SDIO-based MMC/SD card support - * - ****************************************************************************/ - -int stm32_sdio_initialize(void) -{ - int ret; - -#ifdef HAVE_NCD - /* Card detect */ - - bool cd_status; - - /* Configure the card detect GPIO */ - - stm32_configgpio(GPIO_SDMMC1_NCD); - - /* Register an interrupt handler for the card detect pin */ - - stm32_gpiosetevent(GPIO_SDMMC1_NCD, true, true, true, stm32_ncd_interrupt); -#endif - - /* Mount the SDIO-based MMC/SD block driver */ - /* First, get an instance of the SDIO interface */ - - finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO); - - sdio_dev = sdio_initialize(SDIO_SLOTNO); - - if (!sdio_dev) { - syslog(LOG_ERR, "[boot] Failed to initialize SDIO slot %d\n", SDIO_SLOTNO); - return -ENODEV; - } - - /* Now bind the SDIO interface to the MMC/SD driver */ - - finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR); - - ret = mmcsd_slotinitialize(SDIO_MINOR, sdio_dev); - - if (ret != OK) { - syslog(LOG_ERR, "[boot] Failed to bind SDIO to the MMC/SD driver: %d\n", ret); - return ret; - } - - finfo("Successfully bound SDIO to the MMC/SD driver\n"); - -#ifdef HAVE_NCD - /* Use SD card detect pin to check if a card is g_sd_inserted */ - - cd_status = !stm32_gpioread(GPIO_SDMMC1_NCD); - finfo("Card detect : %d\n", cd_status); - - sdio_mediachange(sdio_dev, cd_status); -#else - /* Assume that the SD card is inserted. What choice do we have? */ - - sdio_mediachange(sdio_dev, true); -#endif - - return OK; -} - -#endif /* CONFIG_MMCSD */ diff --git a/boards/stm/nucleo-F767ZI/src/spi.c b/boards/stm/nucleo-F767ZI/src/spi.c deleted file mode 100644 index b7b3388590..0000000000 --- a/boards/stm/nucleo-F767ZI/src/spi.c +++ /dev/null @@ -1,393 +0,0 @@ -/**************************************************************************** - * - * Copyright (C) 2012 PX4 Development Team. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name PX4 nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/** - * @file px4nucleo_spi.c - * - * Board-specific SPI functions. - */ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include "board_config.h" - -/**************************************************************************** - * Pre-Processor Definitions - ****************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: stm32_spiinitialize - * - * Description: - * Called to configure SPI chip select GPIO pins for the PX4FMU board. - * - ************************************************************************************/ - -__EXPORT void stm32_spiinitialize(void) -{ -#ifdef CONFIG_STM32F7_SPI1 - stm32_configgpio(GPIO_SPI_CS_MPU9250); - stm32_configgpio(GPIO_SPI_CS_HMC5983); - stm32_configgpio(GPIO_SPI_CS_MS5611); - stm32_configgpio(GPIO_SPI_CS_ICM_20608_G); - - /* De-activate all peripherals, - * required for some peripheral - * state machines - */ - stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1); - stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1); - stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1); - stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1); - - stm32_configgpio(GPIO_DRDY_MPU9250); - stm32_configgpio(GPIO_DRDY_HMC5983); - stm32_configgpio(GPIO_DRDY_ICM_20608_G); -#endif - -#ifdef CONFIG_STM32F7_SPI2 - stm32_configgpio(GPIO_SPI_CS_FRAM); - stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1); -#endif - -} - -/************************************************************************************ - * Name: stm32_spi_bus_initialize - * - * Description: - * Called to configure SPI chip select GPIO pins for the PX4FMU board. - * - ************************************************************************************/ -static struct spi_dev_s *spi_sensors; -static struct spi_dev_s *spi_fram; -static struct spi_dev_s *spi_baro; -static struct spi_dev_s *spi_icm; - -__EXPORT int stm32_spi_bus_initialize(void) -{ - /* Configure SPI-based devices */ - - spi_sensors = stm32_spibus_initialize(PX4_SPI_BUS_SENSORS); - - if (!spi_sensors) { - syslog(LOG_ERR, "[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_SENSORS); - return -ENODEV; - } - - /* Default PX4_SPI_BUS_SENSORS to 1MHz and de-assert the known chip selects. */ - SPI_SETFREQUENCY(spi_sensors, 10000000); - SPI_SETBITS(spi_sensors, 8); - SPI_SETMODE(spi_sensors, SPIDEV_MODE3); - - for (int cs = PX4_SENSORS_BUS_FIRST_CS; cs <= PX4_SENSORS_BUS_LAST_CS; cs++) { - SPI_SELECT(spi_sensors, cs, false); - } - - /* Get the SPI port for the FRAM */ - - spi_fram = stm32_spibus_initialize(PX4_SPI_BUS_RAMTRON); - - if (!spi_fram) { - syslog(LOG_ERR, "[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_RAMTRON); - return -ENODEV; - } - - /* Default SPI_BUS_RAMTRON to 12MHz and de-assert the known chip selects. - */ - - SPI_SETFREQUENCY(spi_fram, 12 * 1000 * 1000); - SPI_SETBITS(spi_fram, 8); - SPI_SETMODE(spi_fram, SPIDEV_MODE3); - - for (int cs = PX4_RAMTRON_BUS_FIRST_CS; cs <= PX4_RAMTRON_BUS_LAST_CS; cs++) { - SPI_SELECT(spi_fram, cs, false); - } - - /* Get the SPI port for the BARO */ - - spi_baro = stm32_spibus_initialize(PX4_SPI_BUS_BARO); - - if (!spi_baro) { - syslog(LOG_ERR, "[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_BARO); - return -ENODEV; - } - - /* MS5611 has max SPI clock speed of 20MHz - */ - - SPI_SETFREQUENCY(spi_baro, 20 * 1000 * 1000); - SPI_SETBITS(spi_baro, 8); - SPI_SETMODE(spi_baro, SPIDEV_MODE3); - - for (int cs = PX4_BARO_BUS_FIRST_CS; cs <= PX4_BARO_BUS_LAST_CS; cs++) { - SPI_SELECT(spi_baro, cs, false); - } - - /* Get the SPI port for the PX4_SPI_BUS_ICM */ - - spi_icm = stm32_spibus_initialize(PX4_SPI_BUS_ICM); - - if (!spi_icm) { - syslog(LOG_ERR, "[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_ICM); - return -ENODEV; - } - - /* ICM 20608 G has max SPI clock speed of 8MHz - */ - - SPI_SETFREQUENCY(spi_icm, 8 * 1000 * 1000); - SPI_SETBITS(spi_icm, 8); - SPI_SETMODE(spi_icm, SPIDEV_MODE3); - - for (int cs = PX4_ICM_BUS_FIRST_CS; cs <= PX4_ICM_BUS_LAST_CS; cs++) { - SPI_SELECT(spi_icm, cs, false); - } - - return OK; - -} - -/* Define CS GPIO array */ - -static const uint32_t spi1selects_gpio[] = PX4_SENSOR_BUS_CS_GPIO; - -__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected) -{ - /* SPI select is active low, so write !selected to select the device */ - - int sel = (int) devid; - ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_SENSORS); - - /* Making sure the other peripherals are not selected */ - - for (size_t cs = 0; arraySize(spi1selects_gpio) > 1 && cs < arraySize(spi1selects_gpio); cs++) { - if (spi1selects_gpio[cs] != 0) { - stm32_gpiowrite(spi1selects_gpio[cs], 1); - } - } - - uint32_t gpio = spi1selects_gpio[PX4_SPI_DEV_ID(sel)]; - - if (gpio) { - stm32_gpiowrite(gpio, !selected); - } -} - -__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid) -{ - return SPI_STATUS_PRESENT; -} - - -/* Define CS GPIO array */ - -static const uint32_t spi4selects_gpio[] = PX4_RAMTRON_BUS_CS_GPIO; - -__EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected) -{ - int sel = (int) devid; - - if (devid == SPIDEV_FLASH(0)) { - sel = PX4_SPIDEV_FRAM; - } - - ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_RAMTRON); - - /* Making sure the other peripherals are not selected */ - for (int cs = 0; arraySize(spi4selects_gpio) > 1 && cs < arraySize(spi4selects_gpio); cs++) { - stm32_gpiowrite(spi4selects_gpio[cs], 1); - } - - uint32_t gpio = spi4selects_gpio[PX4_SPI_DEV_ID(sel)]; - - if (gpio) { - stm32_gpiowrite(gpio, !selected); - } -} - -__EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid) -{ - /* FRAM is always present */ - return SPI_STATUS_PRESENT; -} -static const uint32_t spi5selects_gpio[] = PX4_BARO_BUS_CS_GPIO; - -__EXPORT void stm32_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected) -{ - /* SPI select is active low, so write !selected to select the device */ - - int sel = (int) devid; - - ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_BARO); - - /* Making sure the other peripherals are not selected */ - for (int cs = 0; arraySize(spi5selects_gpio) > 1 && cs < arraySize(spi5selects_gpio); cs++) { - stm32_gpiowrite(spi5selects_gpio[cs], 1); - } - - uint32_t gpio = spi5selects_gpio[PX4_SPI_DEV_ID(sel)]; - - if (gpio) { - stm32_gpiowrite(gpio, !selected); - } -} - -__EXPORT uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid) -{ - /* FRAM is always present */ - return SPI_STATUS_PRESENT; -} - -static const uint32_t spi6selects_gpio[] = PX4_ICM_BUS_CS_GPIO; - -__EXPORT void stm32_spi6select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected) -{ - /* SPI select is active low, so write !selected to select the device */ - - int sel = (int) devid; - - ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_ICM); - - /* Making sure the other peripherals are not selected */ - for (int cs = 0; arraySize(spi6selects_gpio) > 1 && cs < arraySize(spi6selects_gpio); cs++) { - stm32_gpiowrite(spi6selects_gpio[cs], 1); - } - - uint32_t gpio = spi6selects_gpio[PX4_SPI_DEV_ID(sel)]; - - if (gpio) { - stm32_gpiowrite(gpio, !selected); - } -} - -__EXPORT uint8_t stm32_spi6status(FAR struct spi_dev_s *dev, uint32_t devid) -{ - /* FRAM is always present */ - return SPI_STATUS_PRESENT; -} - -__EXPORT void board_spi_reset(int ms) -{ - /* disable SPI bus */ - stm32_configgpio(GPIO_SPI_CS_OFF_MPU9250); - stm32_configgpio(GPIO_SPI_CS_OFF_HMC5983); - stm32_configgpio(GPIO_SPI_CS_OFF_MS5611); - stm32_configgpio(GPIO_SPI_CS_OFF_ICM_20608_G); - - stm32_gpiowrite(GPIO_SPI_CS_OFF_MPU9250, 0); - stm32_gpiowrite(GPIO_SPI_CS_OFF_HMC5983, 0); - stm32_gpiowrite(GPIO_SPI_CS_OFF_MS5611, 0); - stm32_gpiowrite(GPIO_SPI_CS_OFF_ICM_20608_G, 0); - - stm32_configgpio(GPIO_SPI1_SCK_OFF); - stm32_configgpio(GPIO_SPI1_MISO_OFF); - stm32_configgpio(GPIO_SPI1_MOSI_OFF); - - stm32_gpiowrite(GPIO_SPI1_SCK_OFF, 0); - stm32_gpiowrite(GPIO_SPI1_MISO_OFF, 0); - stm32_gpiowrite(GPIO_SPI1_MOSI_OFF, 0); - - stm32_configgpio(GPIO_DRDY_OFF_MPU9250); - stm32_configgpio(GPIO_DRDY_OFF_HMC5983); - stm32_configgpio(GPIO_DRDY_OFF_ICM_20608_G); - - stm32_gpiowrite(GPIO_DRDY_OFF_MPU9250, 0); - stm32_gpiowrite(GPIO_DRDY_OFF_HMC5983, 0); - stm32_gpiowrite(GPIO_DRDY_OFF_ICM_20608_G, 0); - - /* set the sensor rail off */ - stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN); - stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0); - - /* wait for the sensor rail to reach GND */ - usleep(ms * 1000); - syslog(LOG_DEBUG, "reset done, %d ms\n", ms); - - /* re-enable power */ - - /* switch the sensor rail back on */ - stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1); - - /* wait a bit before starting SPI, different times didn't influence results */ - usleep(100); - - /* reconfigure the SPI pins */ -#ifdef CONFIG_STM32F7_SPI1 - stm32_configgpio(GPIO_SPI_CS_MPU9250); - stm32_configgpio(GPIO_SPI_CS_HMC5983); - stm32_configgpio(GPIO_SPI_CS_MS5611); - stm32_configgpio(GPIO_SPI_CS_ICM_20608_G); - - /* De-activate all peripherals, - * required for some peripheral - * state machines - */ - stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1); - stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1); - stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1); - stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1); - - stm32_configgpio(GPIO_SPI1_SCK); - stm32_configgpio(GPIO_SPI1_MISO); - stm32_configgpio(GPIO_SPI1_MOSI); - - // // XXX bring up the EXTI pins again - // stm32_configgpio(GPIO_GYRO_DRDY); - // stm32_configgpio(GPIO_MAG_DRDY); - // stm32_configgpio(GPIO_ACCEL_DRDY); - // stm32_configgpio(GPIO_EXTI_MPU_DRDY); - -#endif - -} diff --git a/boards/stm/nucleo-F767ZI/src/timer_config.c b/boards/stm/nucleo-F767ZI/src/timer_config.c deleted file mode 100644 index c7c08a737d..0000000000 --- a/boards/stm/nucleo-F767ZI/src/timer_config.c +++ /dev/null @@ -1,126 +0,0 @@ -/**************************************************************************** - * - * Copyright (C) 2012 PX4 Development Team. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name PX4 nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/* - * @file px4nucleo_timer_config.c - * - * Configuration data for the stm32 pwm_servo, input capture and pwm input driver. - * - * Note that these arrays must always be fully-sized. - */ - -#include - -#include -#include -#include - -#include -#include - -#include "board_config.h" - -__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { - { - .base = STM32_TIM1_BASE, - .clock_register = STM32_RCC_APB2ENR, - .clock_bit = RCC_APB2ENR_TIM1EN, - .clock_freq = STM32_APB2_TIM1_CLKIN, - .first_channel_index = 0, - .last_channel_index = 3, - .handler = io_timer_handler0, - .vectorno = STM32_IRQ_TIM1CC, - - }, - { - .base = STM32_TIM4_BASE, - .clock_register = STM32_RCC_APB1ENR, - .clock_bit = RCC_APB1ENR_TIM4EN, - .clock_freq = STM32_APB1_TIM4_CLKIN, - .first_channel_index = 4, - .last_channel_index = 5, - .handler = io_timer_handler1, - .vectorno = STM32_IRQ_TIM4, - } -}; - -__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { - { - .gpio_out = GPIO_TIM1_CH4OUT, - .gpio_in = GPIO_TIM1_CH4IN, - .timer_index = 0, - .timer_channel = 4, - .ccr_offset = STM32_GTIM_CCR4_OFFSET, - .masks = GTIM_SR_CC4IF | GTIM_SR_CC4OF - }, - { - .gpio_out = GPIO_TIM1_CH3OUT, - .gpio_in = GPIO_TIM1_CH3IN, - .timer_index = 0, - .timer_channel = 3, - .ccr_offset = STM32_GTIM_CCR3_OFFSET, - .masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF - }, - { - .gpio_out = GPIO_TIM1_CH2OUT, - .gpio_in = GPIO_TIM1_CH2IN, - .timer_index = 0, - .timer_channel = 2, - .ccr_offset = STM32_GTIM_CCR2_OFFSET, - .masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF - }, - { - .gpio_out = GPIO_TIM1_CH1OUT, - .gpio_in = GPIO_TIM1_CH1IN, - .timer_index = 0, - .timer_channel = 1, - .ccr_offset = STM32_GTIM_CCR1_OFFSET, - .masks = GTIM_SR_CC1IF | GTIM_SR_CC1OF - }, - { - .gpio_out = GPIO_TIM4_CH2OUT, - .gpio_in = GPIO_TIM4_CH2IN, - .timer_index = 1, - .timer_channel = 2, - .ccr_offset = STM32_GTIM_CCR2_OFFSET, - .masks = GTIM_SR_CC2IF | GTIM_SR_CC2OF - }, - { - .gpio_out = GPIO_TIM4_CH3OUT, - .gpio_in = GPIO_TIM4_CH3IN, - .timer_index = 1, - .timer_channel = 3, - .ccr_offset = STM32_GTIM_CCR3_OFFSET, - .masks = GTIM_SR_CC3IF | GTIM_SR_CC3OF - } -}; diff --git a/boards/stm/nucleo-F767ZI/src/usb.c b/boards/stm/nucleo-F767ZI/src/usb.c deleted file mode 100644 index 54adbb13c2..0000000000 --- a/boards/stm/nucleo-F767ZI/src/usb.c +++ /dev/null @@ -1,105 +0,0 @@ -/**************************************************************************** - * - * Copyright (C) 2016 PX4 Development Team. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name PX4 nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/** - * @file px4nucleo_usb.c - * - * Board-specific USB functions. - */ - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include "board_config.h" - -/************************************************************************************ - * Definitions - ************************************************************************************/ - -/************************************************************************************ - * Private Functions - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: stm32_usbinitialize - * - * Description: - * Called to setup USB-related GPIO pins for the PX4FMU board. - * - ************************************************************************************/ - -__EXPORT void stm32_usbinitialize(void) -{ - /* The OTG FS has an internal soft pull-up */ - - /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ - -#ifdef CONFIG_STM32F7_OTGFS - stm32_configgpio(GPIO_OTGFS_VBUS); -#endif -} - -/************************************************************************************ - * Name: stm32_usbsuspend - * - * Description: - * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is - * used. This function is called whenever the USB enters or leaves suspend mode. - * This is an opportunity for the board logic to shutdown clocks, power, etc. - * while the USB is suspended. - * - ************************************************************************************/ - -__EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) -{ - uinfo("resume: %d\n", resume); -}