From 19cf2f47acc157bc2f5c40027056a3725b9de57d Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 21 May 2020 11:57:50 -0700 Subject: [PATCH] stm32h7:adc read & clear EOC on init --- platforms/nuttx/src/px4/stm/stm32h7/adc/adc.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/platforms/nuttx/src/px4/stm/stm32h7/adc/adc.cpp b/platforms/nuttx/src/px4/stm/stm32h7/adc/adc.cpp index 269714d160..d1b8258c1a 100644 --- a/platforms/nuttx/src/px4/stm/stm32h7/adc/adc.cpp +++ b/platforms/nuttx/src/px4/stm/stm32h7/adc/adc.cpp @@ -224,7 +224,7 @@ int px4_arch_adc_init(uint32_t base_address) } - /* arbitrarily configure all channels for 810.5 cycle sample time */ + /* arbitrarily configure all channels for 64.5 cycle sample time */ rSMPR1(base_address) = ADC_SMPR1_DEFAULT; rSMPR2(base_address) = ADC_SMPR2_DEFAULT; @@ -260,6 +260,10 @@ int px4_arch_adc_init(uint32_t base_address) } } + /* Read out result, clear EOC */ + + (void) rDR(base_address); + return OK; } @@ -278,7 +282,7 @@ uint32_t px4_arch_adc_sample(uint32_t base_address, unsigned channel) rISR(base_address) &= ~ADC_INT_EOC; } - /* run a single conversion right now - should take about 810.5 cycles (34 microseconds) max */ + /* run a single conversion right now - should take about 64.5 cycles (34 microseconds) max */ rPCSEL(base_address) |= 1 << channel; rSQR1(base_address) = channel << ADC_SQR1_SQ_OFFSET;