# hw definition file for processing by chibios_hwdef.py # for FMUv3 hardware (ie. for CUAV-PixHack-v5 and Pixhawk4) # MCU class and specific type. It is a F765, which is the same as F767 # but without the TFT interface MCU STM32F7xx STM32F767xx # crystal frequency OSCILLATOR_HZ 16000000 define STM32_LSECLK 32768U define STM32_LSEDRV (3U << 3U) define STM32_PLLSRC STM32_PLLSRC_HSE define STM32_PLLM_VALUE 8 define STM32_PLLN_VALUE 216 define STM32_PLLP_VALUE 2 define STM32_PLLQ_VALUE 9 define CONFIG_HAL_BOARD_SUBTYPE HAL_BOARD_SUBTYPE_CHIBIOS_FMUV5 # board ID for firmware load APJ_BOARD_ID 50 FLASH_RESERVE_START_KB 32 # board voltage STM32_VDD 330U # flash size FLASH_SIZE_KB 2048 # order of UARTs (and USB) UART_ORDER OTG1 # now we define the pins that USB is connected on PA11 OTG_FS_DM OTG1 PA12 OTG_FS_DP OTG1 # these are the pins for SWD debugging with a STlinkv2 or black-magic probe PA13 JTMS-SWDIO SWD PA14 JTCK-SWCLK SWD # SPI1 - internal sensors PG11 SPI1_SCK SPI1 PA6 SPI1_MISO SPI1 PD7 SPI1_MOSI SPI1 # SPI2 - FRAM PI1 SPI2_SCK SPI2 PI2 SPI2_MISO SPI2 PI3 SPI2_MOSI SPI2 # SPI4 - sensors2 PE2 SPI4_SCK SPI4 PE13 SPI4_MISO SPI4 PE6 SPI4_MOSI SPI4 # SPI5 - external1 PF7 SPI5_SCK SPI5 PF8 SPI5_MISO SPI5 PF9 SPI5_MOSI SPI5 # SPI6 - external2 PG13 SPI6_SCK SPI6 PG12 SPI6_MISO SPI6 PB5 SPI6_MOSI SPI6 # sensor CS PF10 MS5611_CS CS PF2 ICM20689_CS CS PF3 ICM20602_CS CS PF4 BMI055_G_CS CS PG10 BMI055_A_CS CS PF5 FRAM_CS CS SPEED_VERYLOW # enable pins PE3 VDD_3V3_SENSORS_EN OUTPUT HIGH PF12 nVDD_5V_HIPOWER_EN OUTPUT LOW PG4 nVDD_5V_PERIPH_EN OUTPUT LOW PG5 VDD_5V_RC_EN OUTPUT HIGH PG6 VDD_5V_WIFI_EN OUTPUT HIGH PG7 VDD_3V3_SD_CARD_EN OUTPUT HIGH SPIDEV ms5611 SPI4 DEVID1 MS5611_CS MODE3 20*MHZ 20*MHZ SPIDEV mpu6000 SPI1 DEVID1 ICM20689_CS MODE0 1*MHZ 1*MHZ SPIDEV icm20602 SPI1 DEVID2 ICM20602_CS MODE0 1*MHZ 1*MHZ SPIDEV bmi055_g SPI1 DEVID3 BMI055_G_CS MODE3 8*MHZ 8*MHZ SPIDEV bmi055_a SPI1 DEVID4 BMI055_A_CS MODE3 8*MHZ 8*MHZ SPIDEV ramtron SPI2 DEVID1 FRAM_CS MODE3 8*MHZ 8*MHZ # enable RAMTROM parameter storage define HAL_STORAGE_SIZE 16384 define HAL_WITH_RAMTRON 1 define STORAGE_FLASH_PAGE 7 define HAL_BARO_DEFAULT HAL_BARO_MS5611_SPI define HAL_INS_DEFAULT HAL_INS_MPU60XX_SPI define HAL_COMPASS_DEFAULT HAL_COMPASS_NONE define CH_DBG_ENABLE_ASSERTS TRUE define CH_DBG_ENABLE_CHECKS TRUE define CH_DBG_SYSTEM_STATE_CHECK TRUE define CH_DBG_ENABLE_STACK_CHECK TRUE # define HAL_SPI_CHECK_CLOCK_FREQ 1