# hw definition file for processing by chibios_pins.py
# for BrainFPV RADIX 2 HD

# MCU class and specific type
MCU STM32H7xx STM32H750xx

# board ID for firmware load
APJ_BOARD_ID 1118

# crystal frequency, setup to use external oscillator
OSCILLATOR_HZ 16000000

MCU_CLOCKRATE_MHZ 480

env OPTIMIZE -O2

define HAL_WITH_EKF_DOUBLE 0

STM32_ST_USE_TIMER 13
define CH_CFG_ST_RESOLUTION 16

# internal flash is off limits
FLASH_SIZE_KB 128
FLASH_RESERVE_START_KB 0
define HAL_FLASH_PROTECTION 1

EXT_FLASH_SIZE_MB 16
EXT_FLASH_RESERVE_START_KB 4096
EXT_FLASH_RESERVE_END_KB 0

# Supports upto 2 MBits/s
CANFD_SUPPORTED 2

# only one I2C bus
I2C_ORDER I2C1

# order of UARTs (and USB)
SERIAL_ORDER OTG1 USART1 USART2 USART3 UART4 UART5 USART6 UART7

# I2C1 for baro
PB6 I2C1_SCL I2C1 PULLUP
PB7 I2C1_SDA I2C1 PULLUP

# Analog inputs
PC0 BATT_VOLTAGE_SENS ADC1 SCALE(1)
PA6 BATT_CURRENT_SENS ADC1 SCALE(1)
PC1 RSSI_ADC ADC1

define HAL_BATT_MONITOR_DEFAULT 4
define HAL_BATT_VOLT_PIN 10
define HAL_BATT_CURR_PIN 3
define HAL_BATT_VOLT_SCALE 17.6
define HAL_BATT_CURR_SCALE 28.5
define BOARD_RSSI_ANA_PIN 11

# Debug
PA13 JTMS-SWDIO SWD
PA14 JTCK-SWCLK SWD

# USB
PA11 OTG_FS_DM OTG1
PA12 OTG_FS_DP OTG1

# USART1 (HD OSD)
PB15 USART1_RX USART1
PB14 USART1_TX USART1

# USART2 (GPS)
PD6 USART2_RX USART2
PD5 USART2_TX USART2

# USART3 (RC input)
PB11 USART3_RX USART3
PD8 USART3_TX USART3

# UART4 (ESC telemetry)
PB8 UART4_RX UART4 NODMA
PA0 UART4_TX UART4 NODMA

# UART5 (spare)
PB12 UART5_RX UART5 NODMA
PB13 UART5_TX UART5 NODMA

# USART6 (spare)
PC7 USART6_RX USART6 NODMA ALT(1)
PC6 USART6_TX USART6 NODMA ALT(1)

# UART7 (spare, RX is on HD connector for RC input, TX is not connected to external pad)
PA8 UART7_RX UART7
PE8 UART7_TX UART7 NODMA

# CAN bus
PD0 CAN1_RX CAN1
PD1 CAN1_TX CAN1

# SP1 for BMI270
PA5 SPI1_SCK SPI1
PB4 SPI1_MISO SPI1
PD7 SPI1_MOSI SPI1
PD3 BMI270_CS CS

# SD card
PC8 SDMMC1_D0 SDMMC1
PC9 SDMMC1_D1 SDMMC1
PC10 SDMMC1_D2 SDMMC1
PC11 SDMMC1_D3 SDMMC1
PC12 SDMMC1_CK SDMMC1
PD2 SDMMC1_CMD SDMMC1

# QuadSPI Flash running at 120 MHz from HCLK
define HAL_FORCE_CLOCK_INIT
define STM32_QSPISEL STM32_QSPISEL_HCLK
PD11 QUADSPI_BK1_IO0 QUADSPI1 SPEED_HIGH
PD12 QUADSPI_BK1_IO1 QUADSPI1 SPEED_HIGH
PE2 QUADSPI_BK1_IO2 QUADSPI1 SPEED_HIGH
PA1 QUADSPI_BK1_IO3 QUADSPI1 SPEED_HIGH
PB10 QUADSPI_BK1_NCS QUADSPI1 SPEED_HIGH
PB2 QUADSPI_CLK QUADSPI1 SPEED_HIGH

# Motors
PE11 TIM1_CH2 TIM1 PWM(1)  GPIO(50) BIDIR # M1
PE13 TIM1_CH3 TIM1 PWM(2)  GPIO(51) BIDIR # M2
PA15 TIM2_CH1 TIM2 PWM(3)  GPIO(52) BIDIR # M3
PA2  TIM2_CH3 TIM2 PWM(4)  GPIO(53) BIDIR # M4
PB5  TIM3_CH2 TIM3 PWM(5)  GPIO(54) BIDIR # M5
PB0  TIM3_CH3 TIM3 PWM(6)  GPIO(55) BIDIR # M6
PD13 TIM4_CH2 TIM4 PWM(7)  GPIO(56) BIDIR # M7
PD14 TIM4_CH3 TIM4 PWM(8)  GPIO(57) BIDIR # M8

# PWM output on UART6 TX and RX pins
PC6 TIM8_CH1 TIM8 PWM(9)  GPIO(58) NODMA # TX6
PC7 TIM8_CH2 TIM8 PWM(10) GPIO(59) NODMA # RX6

# RGB LED output: Currently not working: Needs to be inverted due to level shifter
PA3 TIM5_CH4 TIM5 PWM(11) GPIO(60)

# Buzzer pin
PE4 BUZZER OUTPUT LOW PULLDOWN GPIO(80)
define HAL_BUZZER_PIN 80
define AP_NOTIFY_TONEALARM_ENABLED 1

# LEDs
PE5 LED_RED OUTPUT HIGH OPENDRAIN GPIO(10)
PE6 LED_GREEN OUTPUT HIGH OPENDRAIN GPIO(11)
PA7 LED_BLUE OUTPUT HIGH OPENDRAIN GPIO(12)

define HAL_GPIO_A_LED_PIN 10
define HAL_GPIO_B_LED_PIN 11
define HAL_GPIO_C_LED_PIN 12

define HAL_GPIO_LED_ON  0
define HAL_GPIO_LED_OFF 1

define HAL_HAVE_PIXRACER_LED

# 9V regulator switch
PC14 VTX_PWR OUTPUT HIGH GPIO(81)
define RELAY2_PIN_DEFAULT 81

SPIDEV bmi270 SPI1 DEVID1 BMI270_CS MODE3  2*MHZ  10*MHZ

IMU BMI270 SPI:bmi270 ROTATION_ROLL_180

BARO DPS310 I2C:0:0x76

# probe external compasses (same bus as internal)
define HAL_PROBE_EXTERNAL_I2C_COMPASSES
define HAL_I2C_INTERNAL_MASK 0

# filesystem setup on sdcard
define HAL_OS_FATFS_IO 1

define STM32_PWM_USE_ADVANCED TRUE

define HAL_STORAGE_SIZE 16384

# DMA
DMA_PRIORITY SPI1*
DMA_NOSHARE SPI1* TIM1* TIM2* TIM3* TIM4*
NODMA I2C*
define STM32_I2C_USE_DMA FALSE

# bootloader embedding / bootloader flashing not available
define AP_BOOTLOADER_FLASHING_ENABLED 0