From 9a7b52fd1571617df4186128cfcee4880da58b46 Mon Sep 17 00:00:00 2001 From: Andrew Tridgell Date: Mon, 27 May 2019 11:45:51 +1000 Subject: [PATCH] HAL_ChibiOS: added hwdef.dat for f103-periph --- .../hwdef/f103-periph/hwdef-bl.dat | 99 +++++++++++++ .../hwdef/f103-periph/hwdef.dat | 133 ++++++++++++++++++ 2 files changed, 232 insertions(+) create mode 100644 libraries/AP_HAL_ChibiOS/hwdef/f103-periph/hwdef-bl.dat create mode 100644 libraries/AP_HAL_ChibiOS/hwdef/f103-periph/hwdef.dat diff --git a/libraries/AP_HAL_ChibiOS/hwdef/f103-periph/hwdef-bl.dat b/libraries/AP_HAL_ChibiOS/hwdef/f103-periph/hwdef-bl.dat new file mode 100644 index 0000000000..b172734c4f --- /dev/null +++ b/libraries/AP_HAL_ChibiOS/hwdef/f103-periph/hwdef-bl.dat @@ -0,0 +1,99 @@ +# hw definition file for processing by chibios_pins.py + +# MCU class and specific type +MCU STM32F103 STM32F103xB + +FLASH_RESERVE_START_KB 0 +FLASH_BOOTLOADER_LOAD_KB 25 + +# board ID for firmware load +APJ_BOARD_ID 3 + +# crystal frequency +OSCILLATOR_HZ 8000000 + +define STM32_SW STM32_SW_PLL +define STM32_PLLSRC STM32_PLLSRC_HSE +define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +define STM32_PLLMUL_VALUE 9 +define STM32_PPRE1 STM32_PPRE1_DIV2 +define STM32_PPRE2 STM32_PPRE2_DIV2 +define STM32_ADCPRE STM32_ADCPRE_DIV4 + +define CH_CFG_ST_FREQUENCY 1000 + +# assume 128k flash part +FLASH_SIZE_KB 128 + +STDOUT_SERIAL SD1 +STDOUT_BAUDRATE 57600 + +# board voltage +STM32_VDD 330U + +# order of UARTs +UART_ORDER USART1 +define HAL_USE_UART FALSE + +PA4 LED_BOOTLOADER OUTPUT LOW +define HAL_LED_ON 1 + +# USART1 +PA9 USART1_TX USART1 SPEED_HIGH +PA10 USART1_RX USART1 SPEED_HIGH + +# USART2 +PA2 USART2_TX USART2 SPEED_HIGH +PA3 USART2_RX USART2 SPEED_HIGH + +define HAL_USE_SERIAL TRUE + +define STM32_SERIAL_USE_USART1 TRUE +define STM32_SERIAL_USE_USART2 TRUE +define STM32_SERIAL_USE_USART3 FALSE + +define HAL_NO_GPIO_IRQ +define CH_CFG_ST_TIMEDELTA 0 +#define CH_CFG_USE_DYNAMIC FALSE +define SERIAL_BUFFERS_SIZE 32 +define HAL_USE_EMPTY_IO TRUE +define PORT_INT_REQUIRED_STACK 64 + +# avoid timer and RCIN threads to save memory +define HAL_NO_TIMER_THREAD +define HAL_NO_RCIN_THREAD + +#defined to turn off undef warnings +define __FPU_PRESENT 0 + +define HAL_USE_RTC FALSE +define DISABLE_SERIAL_ESC_COMM TRUE +define NO_DATAFLASH TRUE + +define DMA_RESERVE_SIZE 0 + +define PERIPH_FW TRUE +MAIN_STACK 0x800 +PROCESS_STACK 0x800 +define HAL_DISABLE_LOOP_DELAY + +define HAL_USE_EMPTY_STORAGE 1 +define HAL_STORAGE_SIZE 16384 + +# enable CAN support +PA11 CAN_RX CAN +PA12 CAN_TX CAN +define HAL_USE_CAN TRUE +define STM32_CAN_USE_CAN1 TRUE + +# make bl baudrate match debug baudrate for easier debugging +define BOOTLOADER_BAUDRATE 57600 + +# use a small bootloader timeout +define HAL_BOOTLOADER_TIMEOUT 1000 + +# use PB6 (normally I2C1_SCL) as "hold in bootloader" pin +# this has a hw pullup, so if we set it as input floating +# and look for it low then we know user has pulled it down and +# want to stay in the bootloader +PB6 STAY_IN_BOOTLOADER INPUT FLOATING diff --git a/libraries/AP_HAL_ChibiOS/hwdef/f103-periph/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/f103-periph/hwdef.dat new file mode 100644 index 0000000000..8c519ce5e9 --- /dev/null +++ b/libraries/AP_HAL_ChibiOS/hwdef/f103-periph/hwdef.dat @@ -0,0 +1,133 @@ +# hw definition file for processing by chibios_pins.py + +# MCU class and specific type +MCU STM32F103 STM32F103xB + +# bootloader starts firmware at 25k +FLASH_RESERVE_START_KB 25 + +# store parameters in pages 23 and 24 +define STORAGE_FLASH_PAGE 23 +define HAL_STORAGE_SIZE 800 + +# board ID for firmware load +APJ_BOARD_ID 3 + +# crystal frequency +OSCILLATOR_HZ 8000000 + +define CH_CFG_ST_FREQUENCY 1000 + +# assume the 128k flash part for now +FLASH_SIZE_KB 128 + +# board voltage +STM32_VDD 330U + +# order of UARTs +UART_ORDER USART2 USART1 + +# a LED to flash +PA4 LED OUTPUT LOW + +# USART1, connected to GPS +PA9 USART1_TX USART1 SPEED_HIGH NODMA +PA10 USART1_RX USART1 SPEED_HIGH NODMA + +# USART2 for debug +PA2 USART2_TX USART2 SPEED_HIGH NODMA +PA3 USART2_RX USART2 SPEED_HIGH NODMA + +define HAL_UART_NODMA + +# only one I2C bus in normal config +PB6 I2C1_SCL I2C1 +PB7 I2C1_SDA I2C1 + +PB0 MAG_CS CS + +# spi bus for compass +PA5 SPI1_SCK SPI1 +PA6 SPI1_MISO SPI1 +PA7 SPI1_MOSI SPI1 + +SPIDEV rm3100 SPI1 DEVID1 MAG_CS MODE0 1*MHZ 1*MHZ + +# analog input +# PA5 VIN5 ADC1 +define HAL_USE_ADC TRUE +define STM32_ADC_USE_ADC1 TRUE +define HAL_DISABLE_ADC_DRIVER TRUE + +define HAL_NO_GPIO_IRQ +define CH_CFG_ST_TIMEDELTA 0 +#define CH_CFG_USE_DYNAMIC FALSE +define SERIAL_BUFFERS_SIZE 512 +define PORT_INT_REQUIRED_STACK 64 + +# avoid timer and RCIN threads to save memory +define HAL_NO_TIMER_THREAD +define HAL_NO_RCIN_THREAD + +#defined to turn off undef warnings +define __FPU_PRESENT 0 + +define HAL_USE_RTC FALSE +define DISABLE_SERIAL_ESC_COMM TRUE +define NO_DATAFLASH TRUE + +define DMA_RESERVE_SIZE 0 + +define PERIPH_FW TRUE + +# MAIN_STACK is stack of initial thread +MAIN_STACK 0x100 + +# PROCESS_STACK controls stack for main thread +PROCESS_STACK 0x600 +define HAL_DISABLE_LOOP_DELAY + +# enable CAN support +PA11 CAN_RX CAN +PA12 CAN_TX CAN +define HAL_USE_CAN TRUE +define STM32_CAN_USE_CAN1 TRUE + +define HAL_USE_I2C TRUE +define STM32_I2C_USE_I2C1 TRUE + +define HAL_NO_ROMFS_SUPPORT + +define HAL_UART_MIN_TX_SIZE 256 +define HAL_UART_MIN_RX_SIZE 128 + +define CH_DBG_ENABLE_STACK_CHECK TRUE + +define HAL_UART_STACK_SIZE 256 +define STORAGE_THD_WA_SIZE 512 + +define HAL_NO_GCS +define HAL_NO_LOGGING +define HAL_NO_MONITOR_THREAD + +define HAL_MINIMIZE_FEATURES 0 + +define HAL_BUILD_AP_PERIPH + +# only one I2C bus +I2C_ORDER I2C1 + +define HAL_COMPASS_DEFAULT HAL_COMPASS_RM3100_SPI + +define HAL_I2C_CLEAR_ON_TIMEOUT 0 + +define HAL_DEVICE_THREAD_STACK 768 + +define AP_PARAM_MAX_EMBEDDED_PARAM 0 + +define HAL_PROBE_EXTERNAL_I2C_COMPASSES +define HAL_I2C_INTERNAL_MASK 0 + +# disable dual GPS and GPS blending to save flash space +define GPS_MAX_RECEIVERS 1 +define GPS_MAX_INSTANCES 1