/*
SPI1 overlay for PXF cape

The strategy we use is to do the chip select in software. This is
necessary as the pix mix doesn't allow for the CS pins the cape has
*/

/dts-v1/;
/plugin/;

/* SPI1 */
/* D0 Output and D1 Input */

/ {
    compatible = "ti,beaglebone", "ti,beaglebone-black";

    /* identification */
    part-number = "spi1mux";

    fragment@0 {
        target = <&am33xx_pinmux>;
        __overlay__ {
            spi1_pins_s0: spi1_pins_s0 {
                        pinctrl-single,pins = <
                                0x190 0x33      /* mcasp0_aclkx.spi1_sclk, SPI1_SCLK P9_31 */
                                0x194 0x13      /* mcasp0_fsx.spi1_d0, SPI1_MOSI P9_29 */
                                0x198 0x33      /* mcasp0_axr0.spi1_d1, SPI1_MISO P9_30 */
                                /* setup a dummy CS for the SPI driver to use, then
                                   setup pin modes for the four real CS lines to
                                   set them pull-up */
                                0x058 0x07      /* dummy CS */
				0x164 0x37      /* P9_42 MS5611 CS */
				0x19C 0x37      /* P9_28 MPU6000 CS */
				0x044 0x37      /* P9_23 MPU9250 CS */
				0x030 0x37      /* P8_12 FRAM CS */
                >;
            };
        };
    };

    fragment@1 {
        target = <&spi1>;
        __overlay__ {

             #address-cells = <1>;
             #size-cells = <0>;
             status = "okay";
             pinctrl-names = "default";
             pinctrl-0 = <&spi1_pins_s0>;
             ti,pindir-d0-out-d1-in = <1>;

             spidev@1 {
                 spi-max-frequency = <24000000>;
                 reg = <0>;
                 compatible = "linux,spidev";
            };
        };
    };
};
